TC74ACT74FN datasheet(4/10 Pages) TOSHIBA

No. de pieza	TC74ACT74FN

Descripción Electrónicos	CMOS Digital Integrated Circuit Silicon Monolithic Dual D-Type Flip Flop with Preset and Clear

PDF	10 Pages

Scroll/Zoom	100%

Fabricante Electrónico	TOSHIBA [Toshiba Semiconductor]

Página de inicio	http://www.semicon.toshiba.co.jp/eng

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4 / 10 page

TC74ACT74P/F/FN/FT

2007-10-01

Electrical Characteristics

DC Characteristics

Test Condition

Ta = 25°C

Ta =

−40 to 85°C

Characteristics

Symbol

VCC

(V)

Min

Typ.

Max

Min

Max

Unit

High-level input

voltage

VIH

―

4.5

5.5

2.0

―

2.0

―

Low-level input

voltage

VIL

―

4.5

5.5

―

0.8

―

0.8

High-level output

voltage

VOH

VIN

= VIH or

VIL

IOH = −50 μA

IOH = −24 mA

IOH = −75 mA (Note)

4.5

5.5

4.4

3.94

―

4.5

―

4.4

3.80

3.85

―

Low-level output

voltage

VOL

VIN

= VIH or

VIL

IOL = 50 μA

IOL = 24 mA

IOL = 75 mA

(Note)

4.5

5.5

―

0.0

―

0.1

0.36

―

0.1

0.44

1.65

Input leakage

current

IIN

VIN = VCC or GND

5.5

―

±0.1

―

±1.0

μA

ICC

VIN = VCC or GND

5.5

―

4.0

―

40.0

μA

Quiescent supply

current

Per input: VIN = 3.4 V

Other input: VCC or GND

5.5

―

1.35

―

1.5

Note:

This spec indicates the capability of driving 50 Ω transmission lines.

One output should be tested at a time for a 10 ms maximum duration.

Timing Requirements (input: tr = tf = 3 ns)

Test Condition

Ta =

25°C

Ta =

−40 to

85°C

Characteristics

Symbol

VCC (V)

Limit

Unit

Minimum pulse width

(CK)

tw (L)

tw (H)

―

5.0 ± 0.5

5.0

Minimum pulse width

( CLR , PR )

tw (L)

―

5.0 ± 0.5

5.7

6.5

Minimum set-up time

―

5.0 ± 0.5

3.5

Minimum hold time

―

5.0 ± 0.5

1.5

Minimum removal time

( CLR , PR )

trem

―

5.0 ± 0.5

2.0

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