TQL9062

High Linearity Gain Block with Shutdown

Data Sheet, April 30, 2018 | Subject to change without notice

4 of 9

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TQL9062-PCB Evaluation Board

Notes:

1. See Evaluation Board PCB Information section for material and stack-up.

2.

R3 (0 Ω jumper) is not shown on the schematic and may be replaced with copper trace in the target application layout.

3. All components are of 0402 size unless stated on the schematic.

4.

For TDD Applications: R1 = 20K & R2 = 0Ω

5. For FDD Applications: R1 = 20K

‘OR’ Pin 6 tied to ground. R2 = DNP/Omitted

6. A through line is included on the evaluation board to de-embed the board losses.

7. R4 sets the current draw. Can be changed for the desired bias point. See table below.

Bill of Material

– TQL9062-PCB

Reference Des.

Value

Description

Manuf.

Part Number

N/A

N/A

Printed Circuit Board

Qorvo

U1

n/a

Ultra Low Noise, Flat Gain LNA

Qorvo

TQL9062

R1

20K

Resistor, chip, 0402, 5%, 1/16W

various

R2, 3

0 Ω

Resistor, Chip, 0402, 5%, 1/16W

various

L1

18 nH

Inductor, 0603, coil

various

C3

1000 pF

Cap, chip, 0402

various

C4

1.0 uF

Cap., Chip, 0402

various

C1, C2, C5, C6

100 pF

Cap., Chip, 0402

various

C3

J4

J3

J1

J2

C4

R2

U1

C6

C5

J6

J7

J5

C1

C2

Q1

J2

RF

Output

J4 GND

J3 V

DD

2

1,3,4,5,8

7

J1

RF

Input

L1

18 nH

(0603) C2

100 pF

C1

100 pF

C3

1000 pF

C4

1 uF

R2

0



J5 P

D

6

R1

20K



See notes 4 & 5.