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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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WM8994ECS/R Datasheet(PDF) 93 Page - Cirrus Logic |
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WM8994ECS/R Datasheet(HTML) 93 Page - Cirrus Logic |
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93 / 363 page  WM8994 Rev 4.6 93 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R1028 (0404h) AIF1 ADC2 Left Volume 8 AIF1ADC2_ VU N/A AIF1ADC2 output path (AIF1, Timeslot 1) Volume Update Writing a 1 to this bit will cause the AIF1ADC2L and AIF1ADC2R volume to be updated simultaneously 7:0 AIF1ADC2L _VOL [7:0] C0h (0dB) AIF1ADC2 (Left) output path (AIF1, Timeslot 1) Digital Volume 00h = MUTE 01h = -71.625dB … (0.375dB steps) EFh = +17.625dB (See Table 35 for volume range) R1029 (0405h) AIF1 ADC2 Right Volume 8 AIF1ADC2_ VU N/A AIF1ADC2 output path (AIF1, Timeslot 1) Volume Update Writing a 1 to this bit will cause the AIF1ADC2L and AIF1ADC2R volume to be updated simultaneously 7:0 AIF1ADC2R _VOL [7:0] C0h (0dB) AIF1ADC2 (Right) output path (AIF1, Timeslot 1) Digital Volume 00h = MUTE 01h = -71.625dB … (0.375dB steps) EFh = +17.625dB (See Table 35 for volume range) Table 34 AIF1 Output Path Volume Control |
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