WM8994ECSSLASHR datasheet(120/363 Pages) CIRRUS

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WM8994

120

Rev 4.6

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R46 (002Eh)

Output Mixer

(2)

IN2RP_TO_MIXOUTR

IN2RP to MIXOUTR Mute

0 = Mute

1 = Un-mute

Note that VMID_BUF_ENA must be

set when using the IN2RP input to

MIXOUTR.

R48 (0030h)

Output Mixer

(4)

11:9

IN2RP_MIXOUTR_VOL

[2:0]

000

IN2RP to MIXOUTR Volume

0dB to -21dB in 3dB steps

000 = 0dB

001 = -3dB

…(3dB steps)

111 = -21dB

(See Table 59 for Volume Range)

R46 (002Eh)

Output Mixer

(2)

MIXINL_TO_MIXOUTR

MIXINL Output (Left ADC bypass) to

MIXOUTR Mute

0 = Mute

1 = Un-mute

R50 (0032h)

Output Mixer

(6)

5:3

MIXINL_MIXOUTR_VO

L[2:0]

000

MIXINL Output (Left ADC bypass) to

MIXOUTR Volume

0dB to -21dB in 3dB steps

000 = 0dB

001 = -3dB

…(3dB steps)

111 = -21dB

(See Table 59 for Volume Range)

R46 (002Eh)

Output Mixer

(2)

MIXINR_TO_MIXOUTR

MIXINR Output (Right ADC bypass)

to MIXOUTR Mute

0 = Mute

1 = Un-mute

R50 (0032h)

Output Mixer

(6)

2:0

MIXINR_MIXOUTR_VO

L [2:0]

000

MIXINR Output (Right ADC bypass)

to MIXOUTR Volume

0dB to -21dB in 3dB steps

000 = 0dB

001 = -3dB

…(3dB steps)

111 = -21dB

(See Table 59 for Volume Range)

R46 (002Eh)

Output Mixer

(2)

DAC1R_TO_MIXOUTR

Right DAC1 to MIXOUTR Mute

0 = Mute

1 = Un-mute

R50 (0032h)

Output Mixer

(6)

11:9

DAC1R_MIXOUTR_VO

L [2:0]

000

Right DAC1 to MIXOUTR Volume

0dB to -21dB in 3dB steps

000 = 0dB

001 = -3dB

…(3dB steps)

111 = -21dB

(See Table 59 for Volume Range)

Table 58 Right Output Mixer (MIXOUTR) Control

WM8994ECS/R Datasheet(PDF) 120 Page - Cirrus Logic

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