WM8994ECSSLASHR datasheet(149/363 Pages) CIRRUS

149 / 363 page

WM8994

Rev 4.6

149

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R1792

(0700h)

GPIO1

GP1_DIR

GPIO1 Pin Direction

0 = Output

1 = Input

GP1_PU

GPIO1 Pull-Up Enable

0 = Disabled

1 = Enabled

GP1_PD

GPIO1 Pull-Down Enable

0 = Disabled

1 = Enabled

GP1_POL

GPIO1 Polarity Select

0 = Non-inverted (Active High)

1 = Inverted (Active Low)

GP1_OP_CFG

GPIO1 Output Configuration

0 = CMOS

1 = Open Drain

GP1_DB

GPIO1 Input De-bounce

0 = Disabled

1 = Enabled

GP1_LVL

GPIO1 level. Write to this bit to set

a GPIO output. Read from this bit to

read GPIO input level.

For output functions only, when

GP1_POL is set, the register

contains the opposite logic level to

the external pin.

4:0

GP1_FN [4:0]

0000

GPIO1 Pin Function

(see Table 81 for details)

Table 78 GPIO1 Control

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R1793

(0701h)

GPIO2

GP2_DIR

GPIO2 Pin Direction

0 = Reserved

1 = Input

GP2_PU

GPIO2 Pull-Up Enable

0 = Disabled

1 = Enabled

GP2_PD

GPIO2 Pull-Down Enable

0 = Disabled

1 = Enabled

GP2_POL

GPIO2 Polarity Select

0 = Non-inverted (Active High)

1 = Inverted (Active Low)

GP2_DB

GPIO2 Input De-bounce

0 = Disabled

1 = Enabled

GP2_LVL

GPIO2 level. Read from this bit to

read GPIO input level.

4:0

GP2_FN [4:0]

0001

GPIO2 Pin Function

(see Table 81 for details)

Table 79 GPIO2 Control

WM8994ECS/R Datasheet(PDF) 149 Page - Cirrus Logic

WM8994ECS/R Datasheet(HTML) 149 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Descarga

Enlace URL