74VHC245 datasheet(1/8 Pages) STMICROELECTRONICS

No. de pieza	74VHC245

Descripción Electrónicos	OCTAL BUS TRANSCEIVER 3-STATE

PDF	8 Pages

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Fabricante Electrónico	STMICROELECTRONICS [STMicroelectronics]

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74VHC245

OCTAL BUS

TRANSCEIVER (3-STATE)

PRELIMINARY DATA

June 1999

ORDER CODES :

74VHC245M

74VHC245T

M

(Micro Package)

s

HIGH SPEED: tPD = 4.0 ns (TYP.) at VCC =5V

s

LOW POWER DISSIPATION:

ICC =4

µA (MAX.) at TA =25 oC

s

HIGH NOISE IMMUNITY:

VNIH =VNIL =28% VCC (MIN.)

s

POWER DOWN PROTECTION ON CONTROL

INPUTS

s

SYMMETRICAL OUTPUT IMPEDANCE:

|IOH|=IOL = 8 mA (MIN)

s

BALANCED PROPAGATION DELAYS:

tPLH

≅ tPHL

s

OPERATING VOLTAGE RANGE:

VCC (OPR) = 2V to 5.5V

s

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 245

s

IMPROVED LATCH-UP IMMUNITY

s

LOW NOISE VOLP = 0.9V (Max.)

DESCRIPTION

The 74VHC245 is an advanced high-speed

CMOS OCTAL BUS TRANSCEIVER (3-STATE)

fabricated with sub-micron silicon gate and

double-layer metal wiring C

2MOS technology.

This IC is intended for two-way asynchronous

communication

between

data

busses;

the

direction of data trasmission is determined by the

level of the DIR input. The enable input G can be

T

(TSSOP Package)

used to disable the device so that the busses are

effectively isolated.

All inputs

and

outputs are

equipped with

protection circuits against static discharge, giving

them 2kV ESD immunity and transient excess

voltage.

IT IS PROHIBITED TO APPLY A SIGNAL TO A

TERMINAL WHEN IT IS IN OUTPUT MODE

AND WHEN A BUS TERMINAL IS FLOATING

(HIGH IMPEDANCE STATE) IT IS REQUESTED

TO FIX THE INPUT LEVEL BY MEANS OF

EXTERNAL

PULL

DOWN

OR

PULL

UP

RESISTOR.

PIN CONNECTION AND IEC LOGIC SYMBOLS

®

1/8

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74VHC245 Datasheet(PDF) 1 Page - STMicroelectronics

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