STM32L452VCU6 datasheet(142/210 Pages) STMICROELECTRONICS

No. de pieza	STM32L452VCU6

Descripción Electrónicos	Ultra-low-power ARM® Cortex®-M4 32-bit MCUFPU, 100DMIPS, up to 512KB Flash, 160KB SRAM, analog, audio, ext. SMPS

PDF	210 Pages

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Fabricante Electrónico	STMICROELECTRONICS [STMicroelectronics]

Página de inicio	http://www.st.com

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142 / 210 page

Electrical characteristics

STM32L452xx

142/210

DocID029968 Rev 3

All I/Os are CMOS- and TTL-compliant (no software configuration required). Their

characteristics cover more than the strict CMOS-technology or TTL parameters. The

coverage of these requirements is shown in Figure 25 for standard I/Os, and in Figure 25 for

5 V tolerant I/Os.

Figure 25. I/O input characteristics

Output driving current

The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or

source up to ± 20 mA (with a relaxed VOL/VOH).

RPD

Weak pull-down

equivalent resistor(8)

VIN = VDDIOx

kΩ

CIO

I/O pin capacitance

1. Refer to Figure 25: I/O input characteristics.

2. Tested in production.

3. Guaranteed by design.

4. Max(VDDXXX) is the maximum value of all the I/O supplies. Refer to Table: Legend/Abbreviations used in the pinout table.

5. To sustain a voltage higher than MIN(VDD, VDDA, VDDUSB) +0.3 V, the internal Pull-up and Pull-Down resistors must be

disabled.

6. All TX_xx IO except FT_u and PC3.

7. This value represents the pad leakage of the IO itself. The total product pad leakage is provided by this formula:

ITotal_Ileak_max = 10 µA + [number of IOs where VIN is applied on the pad] ₓ Ilkg(Max).

8. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This

PMOS/NMOS contribution to the series resistance is minimal (~10% order).

Table 71. I/O static characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

STM32L452VCU6 Datasheet(PDF) 142 Page - STMicroelectronics