LP55231 datasheet(16/59 Pages) TI2

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LP5523 INPUT

CURRENT 1 mA/DIV

PWM POWERSAVE

ENABLED

INPUT CURRENT ~50 éA

DURING PWM

POWERSAVE

LED CURRENT 5 mA/DIV

TIME 1 ms/DIV

LP55231

SNOSCR5D – MARCH 2013 – REVISED DECEMBER 2016

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Feature Description (continued)

7.3.6.3 Controlling The High-Side LED Drivers

1. Direct PWM Control: All LP55231 LED drivers, D1 to D9, can be controlled independently through the two-

wire serial I2C-compatible interface. For each high-side driver there is a PWM control register. Direct PWM

control is active by default.

2. Controlling by Program Execution Engines: Engine control is used when the user wants to create

programmed sequences. The program execution engine has a higher priority than direct control registers.

Therefore, if the user has set the PWM register to a certain value, it is automatically overridden when the

program execution engine controls the driver. LED control and program execution engine operation is

described in Control Register Details.

3. Master Fader Control: In addition to LED-by-LED PWM register control, the LP55231 is equipped with master

fader control, which allows the user to fade in or fade out multiple LEDs by writing to only one register. This

is a useful function to minimize serial bus traffic between the MCU and the LP55231. The LP55231 has three

master fader registers, so it is possible to form three master fader groups.

7.3.7 Automatic Power-Save Mode

Automatic power-save mode is enabled when POWERSAVE_EN bit in register address 36H is 1. Almost all

analog blocks are powered down in power save if an external clock signal is used. Only the charge-pump

protection circuits remain active. However, if the internal clock has been selected, only charge pump and LED

drivers are disabled during the power save; the digital part of the LED controller needs to stay active. In both

cases the charge pump enters the weak 1× mode. In this mode the charge pump utilizes a passive current

limited keep-alive switch, which keeps the output voltage at the battery level. During the program execution

LP55231 can enter power save if there is no PWM activity in any of the LED driver outputs. To prevent short

power-save sequences during program execution, LP55231 has an instruction look-ahead filter. During program

execution engine 1, engine 2, and engine 3 instructions are constantly analyzed, and if there are time intervals of

more than 50 ms in length with no PWM activity on LED driver outputs, the device enters power save. In power-

save mode program execution continues uninterrupted. When an instruction that requires PWM activity is

executed, a fast internal start-up sequence is started automatically.

7.3.8 PWM Power-Save Mode

PWM cycle power-save mode is enabled when register 36 bit [2] PWM_PS_EN is set to 1. In PWM power-save

mode analog blocks are powered down during the down time of the PWM cycle. Which blocks are powered down

depends whether the external or internal clock is used. While the automatic power-save mode (see Automatic

Power-Save Mode) saves energy when there is no PWM activity at all, the PWM power-save mode saves energy

during PWM cycles. Like the automatic power-save mode, PWM power-save mode also works during program

execution. Figure 18 shows the principle of the PWM power-save technique. An LED on D9 output is driven at

50% PWM, 5-mA current (top waveform). After PWM power-save enable, the LED-current remains the same, but

the LP55231 input current drops down to about 50 µA when the LED is OFF, or to approximately 200 µA when

the charge-pump-powered output(s) are used.

Figure 18. PWM Power-Save Principle

External Clock, VDD = 3.6 V

LP55231 Datasheet(PDF) 16 Page - Texas Instruments

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