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PTH03050YAS Datasheet(PDF) 3 Page - Texas Instruments

No. de pieza PTH03050YAS
Descripción Electrónicos  6-A NON-ISOLATED DDR/QDR MEMORY BUS TERMINATION MODULES
PDF  19 Pages
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Fabricante Electrónico  TI2 [Texas Instruments]
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PTH03050YAS Datasheet(HTML) 3 Page - Texas Instruments

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ELECTRICAL SPECIFICATIONS
PTH03050Y
PTH05050Y
PTH12050Y
SLTS221A–MARCH 2004–REVISED OCTOBER 2005
TA =25°C; nominal VIN;VREF =1.25V;CIN,CO1, and CO2 = typical values; and Io =Iomax (unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Continuous
0
±6(1)
A
IO
Output current
Over VREF range
Repetitive pulse
±8(2)
A
PTH03050Y
2.95
3.65
VIN
Input voltage range
Over IO range
PTH05050Y
4.5
5.5
V
PTH12050Y
10.8
13.2
∆VREF
Tracking range for VREF
0.55
1.8
V
|VTT–VREF|
Tracking tolerance to VREF
Over line, load and temperature
–10
10
mV
PTH03050Y
88%
η
Efficiency
Io = 4 A
PTH05050Y
87%
PTH12050Y
84%
Vr
Vo Ripple (pk-pk)
20 MHz bandwidth
20
mVpp
Io trip
Overcurrent threshold
Reset, followed by auto recovery
12
A
ttr
Recovery time
80
µsec
15 A/µs load step, from:
Load transient response
–1.5 Ato1.5 A(3)
Vtr
VO over/undershoot
25
40
mV
PTH03050Y
2.45
2.8
VIN Increasing
PTH05050Y
4.3
4.45
V
PTH12050Y
9.5
10.4
UVLO
Under-voltage lockout
PTH03050Y
2.0
2.40
VIN Dncreasing
PTH05050Y
3.4
3.7
V
PTH12050Y
8.8
9
Inhibit control (pin 4)
VIN–0.5
Open(4)
VIH
V
Input high voltage
Referenced to GND
Inhibit control (pin 4)
–0.2
0.6
VIL
V
Input low voltage
Inhibit control (pin 4)
IIL inhibit
Pin to GND
130
µA
Input low curent
IIN inh
Input standby current
Inhibit control (pin 4) to GND
10
mA
PTH03050Y/PTH05050Y
550
600
650
f s
Switching frequency
Over VIN and IO ranges
kHz
PTH12050Y
200
250
300
PTH03050Y/PTH05050Y
220(5)
CIN
External input capacitance
µF
PTH12050Y
560(5)
Capacitance value: Nonceramic
PTH03050Y/PTH05050Y
470(3)
3300(6)
µF
PTH12050Y
940(3)
3300(6)
Co1,Co2
External output capacitance
PTH03050Y/PTH05050Y
200(3)
300
Capacitance value: Ceramic
µF
PTH12050Y
400(3)
600
Equiv. series resistance (non-ceramic)
4(7)
mΩ
MTBF
Reliability
Per Bellcore TR-332 50 % stress, TA =40°C, ground benign
6
106 Hrs
(1) Rating is conditional on the module being directly soldered to a 4-layer PCB with 1 oz. copper. See the SOA curves or contact the
factory for appropriate derating. The PTH03050Y and PTH05050Y require no derating up to 85°C operating temperature and natural
convection airflow.
(2) Up to 10 ms pulse period at 10% maximum duty.
(3) The minimum value of external output capacitance value ensures that VTT meets the specified transient performance requirements for
the memory bus terminations. Lower values of capacitance may be possible when the measured peak change in output current is
consistently less than 3 A.
(4) This control pin has an internal pull-up to the input voltage VIN. If it is left open-circuit the module will operate when input power is
applied. A small low-leakage (<100 nA) MOSFET is recommended for control. For further information, consult the related application
note.
(5) An input capacitor is required for proper operation. The capacitor must be rated for a minimum of 300 mA rms (750 mA rms for 12-V
input) of ripple current.
(6) This is the calculated maximum. The minimum ESR limitation will often result in a lower value. Consult the application notes for further
guidance.
(7) This is the typcial ESR for all the electrolytic (non-ceramic) output capacitance. Use 8 mΩ as the minimum when using max-ESR values
to calculate.
3



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