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LM339LVDR Datasheet(PDF) 20 Page - Texas Instruments |
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LM339LVDR Datasheet(HTML) 20 Page - Texas Instruments |
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20 / 71 page ![]() 6.4.2 Power-On-Reset (POR) The LV family has an internal Power-on-Reset (POR) circuit for known start-up or power-down conditions. While the power supply (V+) is ramping up or ramping down, the POR circuitry will be activated for up to 30µs after the minimum supply voltage threshold of 1.5V is crossed, or immediately when the supply voltage drops below 1.5V. When the supply voltage is equal to or greater than the minimum supply voltage, and after the delay period, the comparator output reflects the state of the differential input (VID). The POR circuit will keep the output high impedance (HI-Z) during the POR period (ton). t ON V OH/2 GND OUT VCC GND + 1.5V GND Figure 6-1. Power-On-Reset Timing Diagram Note that it is the nature of an open collector output that the output will rise with the pull-up voltage during the POR period. A light pull-up (to V+) or pull-down (to GND) resistor can be used to pre-bias the output condition to prevent the output from floating. 6.4.3 Inputs 6.4.3.1 Rail to Rail Input The LV family input voltage range extends from 100mV below GND to 100 mV above V+. The differential input voltage (VID) can be any voltage within these limits. No phase-inversion of the comparator output will occur when the input pins exceed V+ or GND. 6.4.3.2 Fault Tolerant Inputs The LV family inputs are fault tolerant up to 5.5V independent of V+. Fault tolerant is defined as maintaining the same high input impedance when V+ is unpowered or within the recommended operating ranges. The fault tolerant inputs can be any value between 0 V and 5.5 V, even while V+ is zero or ramping up or down. This feature avoids power sequencing issues as long as the input voltage range and supply voltage are within the specified ranges. This is possible since the inputs are not clamped to V+ and the input current maintains its value even when a higher voltage is applied to the inputs. As long as one of the input pins remains within the valid input range, and the supply voltage is valid and not in POR, the output state will be correct. The following is a summary of input voltage excursions and their outcomes: 1. When both IN- and IN+ are within the specified input voltage range: a. If IN- is higher than IN+ and the offset voltage, the output is low. b. If IN- is lower than IN+ and the offset voltage, the output is high. 2. When IN- is higher than the specified input voltage range and IN+ is within the specified voltage range, the output is low. 3. When IN+ is higher than the specified input voltage range and IN- is within the specified input voltage range, the output is high 4. When IN- and IN+ are both outside the specified input voltage range, the output is indeterminate (random). Do not operate in this region. Even with the fault tolerant feature, TI strongly recommends keeping the inputs within the specified input voltage range during normal system operation to maintain datasheet specifications. Operating outside the specified input range can cause changes in specifications such as propagation delay, which can lead to unpredictable behavior. TL331LV, TL391LV, LM393LV, LM339LV SNOSDA4D – JUNE 2020 – REVISED NOVEMBER 2023 www.ti.com 20 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: TL331LV TL391LV LM393LV LM339LV |
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