STM32H533CE datasheet(29/231 Pages) STMICROELECTRONICS

29 / 231 page

DS14539 Rev 1

29/231

STM32H533xx

Functional overview

Figure 3. Power-up/down sequence

1. VDDX refers to any power supply among VDDA, VDDUSB, and VDDIO2.

3.10.2

Power supply supervisor

The devices have an integrated ultra-low-power brownout reset (BOR) active in all modes;

The BOR ensures proper operation of the devices after power on and during power down.

The devices remain in reset mode when the monitored supply voltage VDD is below a

specified threshold, without the need for an external reset circuit.

The lowest BOR level is 1.71 V at power on, and other higher thresholds can be selected

through option bytes.The devices feature an embedded programmable voltage detector

(PVD) that monitors the VDD power supply and compares it to the VPVD threshold.

An interrupt can be generated when VDD drops below the VPVD threshold and/or when VDD

is higher than the VPVD threshold. The interrupt service routine can then generate a warning

message and/or put the MCU into a safe state. The PVD is enabled by software.

In addition, the devices embed a peripheral voltage monitor that compares the independent

supply voltages VDDA, VDDUSB and VDDIO2 to ensure that the peripheral is in its functional

supply range.

The devices support dynamic voltage scaling to optimize power consumption in Run mode.

The voltage from the main regulator that supplies the logic (VCORE) can be adjusted

according to the system maximum operating frequency.

The main regulator operates in the following ranges:

•

VOS0 (VCORE = 1.35 V) with CPU and peripherals running at up to 250 MHz

•

VOS1 (VCORE = 1.2 V) with CPU and peripherals running at up to 200 MHz

•

VOS2 (VCORE = 1.1 V) with CPU and peripherals running at up to 150 MHz

•

VOS3 (VCORE = 1.0 V) with CPU and peripherals running at up to 100 MHz

MSv47490V1

0.3

VBOR0

3.6

Operating mode

Power-on

Power-down

time

VDDX

(1)

VDD

Invalid supply area

VDDX < VDD + 300 mV

VDDX independent from VDD

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