AD8273

Rev. 0 | Page 11 of 16

THEORY OF OPERATION

The AD8273 has two channels, each consisting of a high

precision, low distortion op amp and four trimmed resistors.

Although such a circuit can be built discretely, placing the

resistors on the chip offers advantages to board designers that

include better dc specifications, better ac specification, and

lower production costs.

The resistors on the AD8273 are laser trimmed and tightly

matched. Specifications that depend on the resistor matching,

such as gain drift, common-mode rejection, and gain accuracy,

are better than can be achieved with standard discrete resistors.

The positive and negative input terminals of the AD8273

op amp are not pinned out intentionally. Keeping these nodes

internal means their capacitance is considerably lower than it

would be in discrete designs. Lower capacitance at these nodes

means better loop stability and improved common-mode

rejection vs. frequency.

The internal resistors of the AD8273 lower production cost.

One part rather than several is placed on the board, which

improves both board build time and reliability.

CONFIGURATIONS

The AD8273 can be configured in several different ways; see

Figure 34 to Figure 41. Because these configurations rely on the

internal, matched resistors, these configurations have excellent

gain accuracy and gain drift.

POWER SUPPLIES

A stable dc voltage should be used to power the AD8273. Noise

on the supply pins can adversely affect performance. A bypass

capacitor of 0.1 μF should be placed between each supply pin

and ground, as close to each pin as possible. A tantalum

capacitor of 10 μF should also be used between each supply and

ground. It can be farther away from the AD8273 and typically

can be shared by other precision integrated circuits.

The AD8273 is specified at ±15 V, but it can be used with

The difference between the two supplies must be kept below 36 V.

12kΩ

2

3

12

14

13

6kΩ

12kΩ

6kΩ

–IN1

OUT1

+IN1

12kΩ

6

5

10

8

9

6kΩ

12kΩ

6kΩ

–IN2

OUT2

+IN2

Figure 34. Difference Amplifier, G = ½

6kΩ

3

2

14

13

12kΩ

6kΩ

12kΩ

–IN1

OUT1

+IN1

6kΩ

6

5

10

8

9

12kΩ

6kΩ

12kΩ

–IN2

OUT2

+IN2

12

Figure 35. Difference Amplifier, G = 2

12kΩ

2

3

12

14

13

6kΩ

12kΩ

6kΩ

IN1

OUT1

5

8

12kΩ

6kΩ

12kΩ

610

9

6kΩ

IN2

OUT2

Figure 36. Inverting Amplifier, G = ½

6kΩ

2

3

12

14

13

12kΩ

6kΩ

12kΩ

IN1

OUT1

5

8

6kΩ

12kΩ

6kΩ

6

10

9

12kΩ

IN2

OUT2

Figure 37. Inverting Amplifier, G = 2