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CY2DP814 Datasheet(PDF) 5 Page - Cypress Semiconductor

No. de pieza CY2DP814
Descripción Electrónicos  ComLink??Series
PDF  8 Pages
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Fabricante Electrónico  CYPRESS [Cypress Semiconductor]
Página de inicio  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY2DP814 Datasheet(HTML) 5 Page - Cypress Semiconductor

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ComLink™ Series
CY2DP814
Document #: 38-07060 Rev. *D
Page 5 of 8
Notes:
3. RL = 50 ohm
± 1%; Zline = 50 ohm 6 = Ó.
4. CL includes instrumentation and fixture capacitance within 6 mm of the UT.
5. TPA and B are used for prop delay and rise/fall measurements. TPC is used for VOC measurements only and otherwise connected to VDD – 2.
6. When measuring Tr/Tf, tpd, VOD point TPC is held at VDD – 2.0V.
7. LVCMOS/LVTTL single-ended input value. Ground either input: when on the B side, non-inversion takes place. If A side is grounded, the signal becomes the
complement of the input on B side. See Table 3.
Table 10.High-frequency Parametrics
Parameter
Description
Conditions
Min.
Typ.
Max.
Unit
Fmax
Maximum Frequency
VDD = 3.3V
50% Duty Cycle tW(50–50)
Standard Load Circuit
450
MHz
Fmax(20)
Maximum Frequency
VDD = 3.3V
20% Duty Cycle tW(20–80)
LVPECL Input
Vin = VIH(Max.)/VIL(Min.)
Vout = VOH(Min.)/VOL (Max.) (Limit)
175
MHz
TW
Minimum Pulse
VDD = 3.3V
LVPECL Input
Vin = VIH(Max.)/VIL(Min.) F = 100 MHz
Vout = VOH(Min.)/VOL(Max.).(Limit)
900
ps
Q
Q
VDD
VDD - 2V
Device concept
User Defined
VTT & RTT
Figure 1. Differential PECL Output
80%
20 %
0 V D iffe re n tia l
V0 Y -
V0 Z
t
R
t
F
1.4 V
1.0 V
1.4 V
1.0 V
0V D if f e rentia l
0V D if f e rentia l
1.2 V C M
1.2 V C M
V1A
V1B
V0Y
V0Z
T PL H
T PH L
En1
En2
TP A
TP C
TP B
50
50
GN D
15 0
15 0
S tandard Term in atio n
Pu lse
G enera tor
A
B
10pF
V DD-2V
Figure 2. Differential Receiver to Driver Propagation Delay and Driver Transition Time[3, 4, 5, 6, 7]



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