MC33897ADSLASHR2 datasheet(13/20 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33897/A/B/C/D/T

FUNCTIONAL DESCRIPTION

INTRODUCTION

FUNCTIONAL DESCRIPTION

INTRODUCTION

The 33897 Series is intended for use as a physical layer

device in a Single Wire CAN communications bus.

Communications takes place from a single terminal over a

single wire using a common ground for a current return path.

Two data rates are available, with the high rate used for

factory or assembly line communications and the lower for

actual system communications where the radiated EMI of the

higher rate could be an issue.

Two Pins control the mode of operation (sleep, low-speed,

high-speed, and high-voltage wake-up).

FUNCTIONAL PIN DESCRIPTION

The 33897 Series is intended to be used with an MCU to

control its operation and to process and generate the data for

the bus.

GROUND PINS (33897/A/C/T)

The four ground PINS are not only for electrical

conduction, their number and locations at each of the four

corners serve also to remove heat from the IC. The biggest

benefit of this is obtained by putting a lot of copper on the

PCB in this area and, if ground is an internal layer, by adding

numerous plated-through connections to it with the largest

diameter holes the layout can use.

TXD DATA

The data driven onto the SWCAN bus is inverted from the

TXD terminal. A “1” driven on TXD will result in an undriven

(recessive) state (bus at near zero volts). When the TXD

terminal is low, the output goes to a driven state. The voltage

and waveshaping in the driven state is determined by the

levels on the MODE0 and MODE1 Pins (refer to Table 6).

MODE CONTROL

The MODE Pins control the transmitter filtering and BUS

voltage and the IC sleep mode operation. Table 6 shows the

mode versus the logic levels on MODE0 and MODE1.

The MODE0 and MODE1 Pins have a weak pulldown in

the IC so that in case the Pins are not driven, the device will

enter the sleep mode. This is usually the situation as the

MCU comes out of reset, before the driving signals have

been configured as outputs.

RXD Data

The data received on the bus is translated to logic levels

on this terminal. This terminal is a logic high when the bus is

in the recessive state (near zero volts) and is logic low when

the bus is in either the normal or high-voltage dominant state.

This is an open-drain type of output that requires an

external resistor to pull it up. When the device is in sleep

mode, the output will be off unless a high-voltage wake-up

level is detected on the bus. If the wake-up level is detected,

the output will be driven by the data on the bus. If the level of

the data returns to normal level, the output will return to off

after a short delay unless a non-sleep mode condition is set

by the MCU.

LOAD Switch

This switch is on in all operating modes unless a loss of

ground is detected. If this happens, the switch is opened and

the resistor normally attached to its terminal will no longer

pass current to or from the bus.

CNTL Output (33897/A/C/T ONLY)

This logic level signal is used to control a VCC regulator.

When the output is low, the VCC regulator is expected to

shutdown. This is normally used to shut down the MCU and

all the devices powered by VCC when the IC is in sleep mode.

This is done to save power. When the part is taken out of the

sleep mode by the higher-than-normal bus voltage, this

terminal is asserted high and the VCC regulator brings its

output up to the regulated level. This starts the MCU, which

controls the mode of the IC. The MCU must change the mode

signals to non-sleep mode levels in order to keep this

terminal from going low. There is a delay to allow the MCU to

fully wake up and take control after the high-voltage signaling

is removed before the level on this output returns low. After a

delay time, even if the bus is at high voltage, the IC will return

to sleep mode if both MODE Pins are low.

VBATT Input

This power input is not reverse battery protected and

should use an external diode to protect it from damage owing

to reverse battery if this protection is desired. The voltage

drop of the diode must be taken into consideration when the

operating range of the system is being determined. This

Table 6. Mode Control Logic Levels

Logic Level

Operation

MODE0

MODE1

Sleep Mode

High Voltage Wake-Up Mode

High Speed Mode

Normal Mode

MC33897AD/R2 Datasheet(PDF) 13 Page - Freescale Semiconductor, Inc

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