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AP20N50LP Datasheet(PDF) 1 Page - A POWER MICROELECTRONICS |
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AP20N50LP Datasheet(HTML) 1 Page - A POWER MICROELECTRONICS |
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1 / 7 page ![]() AP20N50LP 500V N-Channel Enhancement Mode MOSFET AP20N50LP REV1.0 永源微電子科技有限公司 Description The AP20N50LP is silicon N-channel Enhanced VDMOSFETs, is obtained by the self-aligned planar Technology which reduce the conduction loss, improve switching performance and enhance the avalanche energy. The transistor can be used in various power switching circuit for system miniaturization and higher efficiency. General Features VDS=500V ID=20A RDS(ON) < 330mΩ @ VGS=10V (Type:260mΩ) Application Uninterruptible Power Supply(UPS) Power Factor Correction (PFC) Package Marking and Ordering Information Product ID Pack Marking Qty(PCS) AP20N50LP TO-247S-3L AP20N50LP XXX YYYY 360 Absolute Maximum Ratings (TC=25℃unless otherwise noted) Symbol Parameter Value Unit VDSS Drain-Source Voltage (VGS = 0V) 500 V ID@TC=25℃ Continuous Drain Current, VGS @ 10V 20 A ID@TC=100℃ Continuous Drain Current, VGS @ 10V 12 A IDM Pulsed Drain Current (note1) 72 A VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 708 mJ IAS Avalanche Current 12 A PD Power Dissipation (TC = 25ºC) 250 W TJ, Tstg Operating Junction and Storage Temperature Range -55~+150 ºC RthJC Thermal Resistance, Junction-to-Case 0.6 ºC/W RthJA Thermal Resistance, Junction-to-Ambient 45 ºC/W |
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