ST7FOXK2 datasheet(18/226 Pages) STMICROELECTRONICS

18 / 226 page

Pin description

ST7FOXF1, ST7FOXK1, ST7FOXK2

18/226

Figure 4.

20-pin SO and DIP package pinout

Legend / Abbreviations for Table 3: Type: I = input, O = output, S = supply

In/Output level:CT= CMOS 0.3VDD/0.7VDD with input trigger

Output level: HS = 20mA high sink (on N-buffer only)

Port and control configuration:

●

Input: float = floating, wpu = weak pull-up, int = interrupt, ana = analog

●

Output: OD = open drain, PP = push-pull

Note:

The RESET configuration of each pin is shown in bold which is valid as long as the device is

in reset state.

PA0

(HS)(5)/OCMP1_A(2)

I/O

(5)

ei0

Port A0 (HS)(5)/ Timer A

Output Compare 1

PA1 (HS)/ATIC

I/O

Port A1

(HS)

ATIC

PA2 (HS)/ATPWM0

I/O

Port A2

(HS)

ATPWM0

In the open-drain output column, T defines a true open-drain I/O (P-Buffer and protection diode to VDD are not

implemented).

Available on ST7FOXK2 only.

It is mandatory to connect all available VDD and VDDA pins to the supply voltage and all VSS and VSSA pins to ground.

BREAK2 available on ST7FOXK2 only

Available on ST7FOXK1 only.

Table 2.

Device pin description (32-pin packages) (continued)

number

Pin name

Level

Port/control

Main

function

(after

reset)

Alternate

function

Input

Output

(HS) 20mA high sink capability

eix

associated external interrupt vector

ei2

I2CDATA/PA6(HS)

PC4/LTIC

PC3/ICCCLK

PC2/ICCDATA

I2CCLK/PA7(HS)

RESET

VSS

PB0/AIN0

PB1/AIN1/CLKIN

PB2/AIN2

PB3/AIN3

PB4/AIN4

ATPWM1/PA3(HS)

ATPWM2/MCO/PA4(HS)

ATPWM3/PA5(HS)

ei1

ATIC/PA1(HS)

ATPWM0/PA2(HS)

VDD

PB5/AIN5

PC6

ei0

ei2

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