M48T559Y

4/18

Note: 1. Effective capacitance measured with power supply at 5V.

2. Sampled only, not 100% tested.

3. Outputs deselected.

Table 6. DC Characteristics

Note: 1. Outputs deselected.

2. Input leakage current on input RESET pins.

4. Negative spikes of –1V allowed for up to 10ns once per cycle.

5. The IRQ pins is Open Drain.

6. Measured with Control Bits set as follows: R = '1'; W, ST, FT = '0'.

Symbol

Parameter

Test Condition

Min

Max

Unit

Input Capacitance

10

pF

(3)

Input / Output Capacitance

10

pF

Symbol

Parameter

Test Condition

Min

Max

Unit

(1)

Input Leakage Current

0V

±1

µA

(1)

Output Leakage Current

0V

±5

µA

(2)

Input Leakage Current

0V

100

µA

Supply Current

Outputs open

50

mA

Supply Current (Standby) TTL

10

mA

(3)

Supply Current (Standby) CMOS

7mA

(4)

Input Low Voltage

–0.3

0.8

V

Input High Voltage

2.2

V

Output Low Voltage

0.4

V

0.4

V

(6)

Output High Voltage

2.4

V

Figure 4. AC Testing Load Circuit

AI01673

5V

OUT

CL = 100pF

CL includes JIG capacitance

1.9k

Ω

DEVICE

UNDER

TEST

1k

Ω

Table 4. AC Measurement Conditions

Note that Output Hi-Z is defined as the point where data is no longer

driven.

Input Rise and Fall Times

≤ 5ns

Input Pulse Voltages

0 to 3V

Input and Output Timing Ref. Voltages

1.5V