DIA7976

Version 1.9, Apr 2025

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© 2025 Dioo Microcircuits Co., Ltd. Jiangsu

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Table 2. Recommended resistors for DIA7976 (Adjustable version)

VOUT (V)

R1 (kΩ)

R2 (kΩ)

0.55

0

Float

1

8.2

10

1.2

18.2

15.4

1.5

21

12.1

1.8

27.4

12

2.5

39

11

3.3

49.9

10

5.5

18

2

10.3. Dropout voltage

A PMOS pass transistor is used to achieve low dropout. The PMOS pass device is in the linear region of

operation and the input-to-output resistance is the RDS(ON) of the PMOS pass element when (VIN - VOUT) is less

than the dropout voltage (VDO). The PMOS device behaves like a resistor in dropout mode therefore VDO scales

approximately with the output current. PSRR and transient response degrade as (VIN - VOUT) approaches dropout

operation with any linear regulator.

10.4.Exiting dropout

A ramping input supply causes an LDO to overshoot on start-up, as shown in Figure 24 when the slew rate and

voltage levels are in the correct range. Use an enable signal to avoid this condition.

Figure 24. Start-up into dropout

Overshooting on the output of the regulator can be caused by the error amplifier having to drive the gate

capacitance of the pass element and bring the gate back to the correct voltage for proper regulation. The gate

voltage (VGS) is pulled all the way down to the ground to give the pass device the lowest on-resistance possible

when the LDO is placed in dropout. However, the output will overshoot until the loop responds and the output

current pulls the output voltage back down into regulation if a line transient occurs when the device is in dropout.

Continue to add input capacitance in the system until the transient is slow enough to reduce the overshoot if

these transients are not acceptable.