M68AF127B datasheet(22/23 Pages) STMICROELECTRONICS

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M68AF127B

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REVISION HISTORY

Table 15. Document Revision History

Date

Version

Revision Details

August 2001

1.0

First Issue.

18-Oct-2001

2.0

SO32 Package Mechanical and Data added (Figure 1, 3 and 16, Table 10).

29-Nov-2001

3.0

Note removed from Ordering Information Scheme.

06-Mar-2002

4.0

Document status changed to Data Sheet.

17-May-2002

5.0

Document globally revised.

31-May-2002

6.0

PDIP32 Package added (Figure 1, 4 and 17, Table 11).

Chip Enable Low VCC Data Retention clarified (Figure 14 and 15, Table 9).

09-Sep-2002

6.1

TSOP32 8x13.4mm and TSOP32 8x20mm packages added (Figure 1, 5, 18 and 19,

Table 12, 13 and 14).

Commercial code clarified.

02-Oct-2002

6.2

Title and header layout modified.

09-Oct-2002

6.3

Datasheet number simplified.

16-Apr-2003

6.4

Label corrected on “E2 Controlled, Low VCC Data Retention AC Waveforms” figure.

08-Aug-2003

6.5

TSOP Package connections modified (Figure 5).

Test conditions for ICCDR modified in Table 9, Low VCC Data Retention

Characteristics.

21-Aug-2003

6.6

TSOP Package connections modified (Figure 5).

24-Sep-2004

Document structure modified:

–

Chapter OPERATION moved before chapter MAXIMUM RATING.

–

AC Characteristics Tables and waveforms moved to the DC/AC PARAMETERS

section.

tPU ad tPD updated in Table 7.

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