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ADG5421 Datasheet(PDF) 9 Page - Analog Devices

No. de pieza ADG5421
Descripción Electrónicos  High Voltage Latch-Up Proof, Dual SPST Switches
PDF  17 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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ADG5421 Datasheet(HTML) 9 Page - Analog Devices

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Data Sheet
ADG5421/ADG5423
Rev. A | Page 9 of 17
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 3. MSOP Pin Configuration
Figure 4. LFCSP Pin Configuration
Table 7. Pin Function Descriptions
MSOP Pin No.1
LFCSP Pin No.
Mnemonic
Description
1
1
S1
Source Terminal 1. This pin can be an input or output.
2
2
S2
Source Terminal 2. This pin can be an input or output.
3
3
NC
No Connect. Not internally connected.
4
4
GND
Ground (0 V) Reference.
5
5
VDD
Most Positive Power Supply Potential.
6
6
IN2
Logic Control Input.
7
7
IN1
Logic Control Input.
8
8
VSS
Most Negative Power Supply Potential.
9
9
D2
Drain Terminal 2. This pin can be an input or output.
10
10
D1
Drain Terminal 1. This pin can be an input or output.
N/A
EPAD
Exposed Pad. The exposed pad is tied to substrate, VSS.
1 N/A means not applicable.
Table 8. ADG5421 Truth Table
INx
Switch Conditions
0
Off
1
On
Table 9. ADG5423 Truth Table
INx
Switch 1 Condition
Switch 2 Condition
0
Off
On
1
On
Off
NOTES
1. NC = NO CONNECT. NOT INTERNALLY CONNECTED.
S1 1
S2 2
NC 3
GND 4
VDD 5
D1
10
D2
9
VSS
8
IN1
7
IN2
6
TOP VIEW
(Not to Scale)
ADG5421/
ADG5423
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
2. EXPOSED PAD TIED TO SUBSTRATE, VSS.
1
S1
2
S2
3
NC
4
GND
5
VDD
10 D1
9D2
8VSS
7IN1
6IN2
ADG5421/
ADG5423
TOP VIEW
(Not to Scale)



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