ML22Q533 datasheet(40/178 Pages) ROHM

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FEDL22Q53X-02

ML22Q53X

 RST counter overflow detection

By using the RST counter overflow detection, it is possible to shift the LSI to the command standby state after power-up

after misoperation detection and failure detection occurs.

When the overflow detection of RST counter is set by RSTEN bit of SAFE command, the detection operation will start.

When the detection operation is started, the detection does not stop even if the RSTEN bit is set to "0".

The RST counter starts counting up after misoperation detection and failure detection occurs.

If the RST counter is cleared with the ERRCL command before it overflows, it stops until the next error occurs.

When the RST counter overflows, the error bit (RSTERR) is set to "1".

Error bit (RSTERR) can be read with RDERR command. Also, error bit (RSTERR) can be cleared by ERRCL command.

The count time of the RST-counter is 2s, the initial-value. The counting time can be set to 125ms, 500ms, 2s, or 4s.

Set the counting time and overflow operation (shift to the command standby state after power-up) with the dedicated tools

(Speech LSI Utility).

The operation when RSTEN is set to "1" is as follows.

*1 Misoperation detection and failure detection outputs are selected by OUTSTAT command.

RSTEN

Set RSTEN = "1"

RST counter

Overflow

RSTERR

Command

SAFE

Count-up

STATUSn pin

*1 n:1 or 2

Clears the RST-counter with ERRCL commands.

The RST counter stops operating.

Signal to shift command

standby state after power-up

ERRCL

Error detection

RDERR

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ML22Q533 Datasheet(PDF) 40 Page - Rohm