ST72260G datasheet(9/171 Pages) STMICROELECTRONICS

9 / 171 page

ST72260G, ST72262G, ST72264G

9/171

Notes:

1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up

column (wpu) is merged with the interrupt column (int), then the I/O configuration is a pull-up interrupt in-

put, otherwise the configuration is a floating interrupt input. Port C is mapped to ei0 or ei1 by option byte.

2. In the open drain output column, “T” defines a true open drain I/O (P-Buffer and protection diode to VDD

are not implemented). See Section 9 "I/O PORTS" on page 38 for more details.

3. OSC1 and OSC2 pins connect a crystal or ceramic resonator, an external RC, or an external source to

the on-chip oscillator see Section 2 "PIN DESCRIPTION" on page 6 and Section 6.2 "MULTI-OSCILLA-

TOR (MO)" on page 21 for more details.

E3 PC2/MCO/AIN2

I/O

ei0/ei1

Port C2

Main clock output (fCPU) or

ADC Analog Input 2

F4 PC1/OCMP1_B/AIN1

I/O

ei0/ei1

Port C1

Timer B Output Compare 1 or

ADC Analog Input 1

17 D3 PC0/ICAP1_B/AIN0

I/O

ei0/ei1

Port C0

Timer B Input Capture 1 or

ADC Analog Input 0

E4 PA7/TDO

I/O CT HS X

ei0

Port A7

SCI output

F5 PA6/SDAI

I/O CT HS X

ei0

Port A6

I2C DATA

F6 PA5 /RDI

I/O CT HS X

ei0

Port A5

SCI input

E6 PA4/SCLI

I/O CT HS X

ei0

Port A4

I2C CLOCK

E5 NC

Not Connected

D6 NC

D5 NC

22 C6 PA3

I/O CT HS X

ei0

Port A3

23 D4 PA2

I/O CT HS X

ei0

Port A2

C5 NC

Not Connected

B6 NC

A6 PA1/ICCDATA

I/O CT HS X

ei0

Port A1

In Circuit Communication Data

A5 PA0/ICCCLK

I/O CT HS X

ei0

Port A0

In Circuit Communication

Clock

B5 ICCSEL

ICC mode pin, must be tied low

A4 VSS

Ground

B4 VDD

Main power supply

Pin n°

Pin Name

Level

Port / Control

Main

Function

(after

reset)

Alternate Function

Input

Output

ST72260G Datasheet(PDF) 9 Page - STMicroelectronics

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