ADE7566 datasheet(88/136 Pages) AD

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ADE7566/ADE7569

Preliminary Technical Data

Rev. PrA | Page 88 of 136

Table 75. LCD Configuration X SFR (LCDCONX, 0x9C)

Bit No.

Mnemonic

Default

Description

Reserved

Reserved.

External Resistor Ladder Selection Bit.

EXTRES

Result

External resistor ladder is disabled. Charge pump is enabled.

EXTRES

External resistor ladder is enabled. Charge pump is disabled.

5 to 0

BIASLVL[5:0]

Bias Level Selection Bits. See Table 76.

Table 76. LCD Bias Voltage When Contrast Control Is Enabled

1/2 Bias

1/3 Bias

BIASLVL[5]

VA (V)

[]

4:0

BLVL

REF ×

VB = VA

VC = 2 x VA

VB = 2 x VA

VC = 3 x VA

[]

⎟

⎠

⎞

⎜

⎝

⎛ +

4:0

BLVL

REF

VB = VA

VC = 2 x VA

VB = 2 x VA

VC = 3 x VA

Table 77. LCD Configuration Y SFR (LCDCONY, 0xB1)

Bit No.

Mnemonic

Default

Description

Reserved

This bit should be kept cleared for proper operation.

INV_LVL

Frame Inversion Mode Enable Bit. If this bit is set, frames are inverted every other frame. If this

bit is cleared, frames are not inverted.

5 to 2

Reserved

These bits should be kept cleared for proper operation.

UPDATEOVER

Update Finished Flag Bit. This bit is updated by LCD driver. When set, this bit indicates that the

LCD memory has been updated and a new frame has begun.

REFRESH

Refresh LCD Data Memory Bit. This bit should be set by user. When set, the LCD driver does not

use the data in the LCD data registers to update display. The LCD data registers can be updated

by the 8052. When cleared, the LCD driver uses the data in the LCD data registers to update

display at the next frame.

Table 78. LCD Clock SFR (LCDCLK, 0x96)

Bit No.

Mnemonic

Default

Description

Blink Mode Clock Source Configuration Bits.

BLKMOD[1:0]

Result

The blink rate is controlled by software. The display is off.

The blink rate is controlled by software. The display is on.

The blink rate is 2 Hz

7 to 6

BLKMOD[1:0]

The blink rate is set by BLKFREQ[1:0]

Blink Rate Configuration Bits. These bits control the LCD blink rate if BLKMOD[1:0] = 11

BLKFREQ[1:0]

Result (Blink Rate)

1 Hz

1/2 Hz

1/3 Hz

5 to 4

BLKFREQ[1:0]

1/4 Hz

3 to 0

FD[3:0]

LCD Frame Rate Selection Bits. See Table 79 and Table 80.

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