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TDA7502 Datasheet(PDF) 6 Page - STMicroelectronics

No. de pieza TDA7502
Descripción Electrónicos  In-car remote amplifier DSP
PDF  25 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

TDA7502 Datasheet(HTML) 6 Page - STMicroelectronics

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Block diagram and PIN description
TDA7502
6/25
Table 1.
Pin description
N.
Name
Type
Reset
status
Function
1
VDD1
P
3.3V core supply.
2
GND1
G
Core ground.
3INT
I/O
External interrupt line (Input/Output). When this line is
asserted low, the DSP may be interrupted. Acts as IRQA
line of DSP core.
4
SCANEN
I
SCAN enable when active with TESTEN also active,
controls theshifting of the internal scan chains.
5
TESTEN
I
Test enable when active, puts the chip into test mode and
muxes the XTI clock to all flip-flops. When SCANEN is also
active, the scan chain shifting
6DBRQN
I
Debug port request Input. A means of entering the Debug
mode of operation.
7
DBOUT/GPIO2
I/O
I
The serial data output for the Debug port. Can also be
used as a GPIO.
8
VDD2
I
3.3V core supply.
9
GND2
I
Core ground.
10
DBCK/GPIO0
I/O
I
Debug port Bit Clock/Chip status 1. The serial clock for the
Debug Port is provided when an input. When an output,
provides information about the chip status. Can also be
used as GPIO
11
DBIN/GPIO1
I/O
I
Debug port Serial Input/Chip status 0. The serial data
input for the Debug Port is provided when an input. When
an output, provides information about the chip status. Can
also be used as GPIO.
12
CLKOUT
O
Output clock.
13
PGND
G
PLL clock ground Input. Ground connection for oscillator
circuit.
14
PVCC
P
PLL clock power supply. Positive supply for PLL clock
oscillator.
15
XTO (1)
O
High
Crystal oscillator output. Crystal oscillator output drive.
16
XTI (1)
I–
Crystal oscillator input. External clock input or crystal
connection.
17
RESET
I/O
I
System reset. A logic low level applied to RESET input
initializes DSPs. During debug mode if this pin is pulled
low in while the DBRQN line is pulled low then the DSP
pointed to by the DBSEL pin will be reset.
18
VDD3
P
3.3V supply.
19
GND3
G
Ground.
20
SDI0
I
SDI0 is a stereo digital audio data input pin channel 0.
21
SDI1
I
SDI1 is a stereo digital audio data input pin channel 1.
22
SDI2
I
SDI2 is a stereo digital audio data input pin channel 2.



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