HD74LS166AP datasheet(6/8 Pages) RENESAS

No. de pieza	HD74LS166AP

Descripción Electrónicos	8-bit Shift Register

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Fabricante Electrónico	RENESAS [Renesas Technology Corp]

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HD74LS166A

Rev.4.00, May 10, 2006, page 6 of 7

Waveform

Output QH

Clock

Input

Clear

Input

Data

Input

1.3V

tn tn + 1

tn + 1

tsu

tw (Clear)

tPHL

tPLH

VOH

VOL

tw (Clock)

Notes:

Input pulse;

≤ 15 ns, t

THL

≤ 6 ns, PRR = 1 MHz, duty cycle 50%

Clock input; tw

≥ 20 ns

Clear inpu; tw

≥ 20 ns, t

h = 10 ns, when testing

max, vary the clock PRR.

Propagation delay time (tPLH and tPHL) are measured at tn + 1. Proper shifting of data is verified

at tn + 8 with a functional test.

tn; bit time before clocking transition.

tn + 1; bit time after one clocking transition.

tn + 8; bit time after eight clocking transition.

Typical Clear, Shift, Load, Inhibit, and Shift Sequences

Serial Shift

Clock Inhibit

Shift / Load

Load

Clock

Clear

Output QH

Serial Input

Inhibit

LLL

Parallel

Inputs

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