R8C2K datasheet(55/471 Pages) RENESAS

55 / 471 page

R8C/2K Group, R8C/2L Group

6. Voltage Detection Circuit

Rev.1.10

Dec 21, 2007

Page 38 of 450

REJ09B0406-0110

Figure 6.8

VW2C Register

Voltage Monitor 2 Circuit Control Register

(1)

Symbol

Address

After Reset(8)

VW2C

0037h

00h

Bit Symbol

Bit Name

Function

NOTES:

9. When the VW2C6 bit is set to 1 (voltage monitor 2 reset mode), set the VW2C7 bit to 1 (w hen VCC reaches Vdet2

or below ). (Do not set to 0.)

Set the PRC3 bit in the PRCR register to 1 (w rite enable) before w riting to the VW2C register.

To use the voltage monitor 2 interrupt to exit stop mode and to return again, w rite 0 to the VW2C1

bit before w riting 1.

The VW2C2 bit is enabled w hen the VCA27 bit in the VCA2 register is set to 1 (voltage detection 2 circuit

enabled).

Set this bit to 0 by a program. When 0 is w ritten by a program, it is set to 0 (and remains unchanged even if 1 is

w ritten to it).

The VW2C6 bit is enabled w hen the VW2C0 bit is set to 1 (voltage monitor 2 interrupt/enables reset).

The VW2C0 bit is enabled w hen the VCA27 bit in the VCA2 register is set to 1 (voltage detection 2 circuit

enabled). Set the VW2C0 bit to 0 (disable) w hen the VCA27 bit is set to 0 (voltage detection 2 circuit disabled).

The VW2C7 bit is enabled w hen the VW2C1 bit is set to 1 (digital filter disabled mode).

Bits VW2C2 and VW2C3 remain unchanged after a softw are reset, w atchdog timer reset, voltage monitor 1 reset,

or voltage monitor 2 reset.

VW2C7

Voltage monitor 2 interrupt/reset

generation condition select bit(7, 9)

0 : When VCC reaches Vdet2 or above

1 : When VCC reaches Vdet2 or below

VW2C6

Voltage monitor 2 circuit mode

select bit(5)

0 : Voltage monitor 2 interrupt mode

1 : Voltage monitor 2 reset mode

VW2C3

WDT detection flag(4, 8)

VW2F1

Sampling clock select bits

b5 b4

0 0 : f OCO-S divided by 1

0 1 : f OCO-S divided by 2

1 0 : f OCO-S divided by 4

1 1 : f OCO-S divided by 8

VW2F0

0 : Not detected

1 : Detected

0 : Digital f ilter enabled mode

(digital filter circuit enabled)

1 : Digital f ilter disabled mode

(digital filter circuit disabled)

VW2C2

Voltage change detection

flag(3, 4, 8)

VW2C1

Voltage monitor 2 digital filter

disable mode select bit(2)

VW2C0

Voltage monitor 2 interrupt/reset

enable bit(6)

0 : Disable

1 : Enable

b7 b6 b5 b4 b3 b2

0 : Not detected

1 : VCC has crossed Vdet2

b1 b0

R8C2K Datasheet(PDF) 55 Page - Renesas Technology Corp

R8C2K Datasheet(HTML) 55 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Descarga

Enlace URL