TS834

3/8

Time r

Vcc+

Input

Vref

GND

Time r C ontrol

RESE T

OUTP UT

RESE T

OUTP UT

Vcc

Vcc

Time r e na ble : timer control to Vcc

Time r dis a ble : time r control to Gnd

TIMING DIAGRAMS

All the timing diagrams are given with outputs loaded by 10kW resistors to V

Active Low Reset, Timer Enabled

Active Low Reset, Timer Disabled

Active High Reset, Timer Disabled

Active High Reset, Timer Enabled