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MPC5633MMLL80 Datasheet(PDF) 99 Page - Freescale Semiconductor, Inc |
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MPC5633MMLL80 Datasheet(HTML) 99 Page - Freescale Semiconductor, Inc |
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99 / 106 page  MPC5634M Microcontroller Data Sheet, Rev. 8 Freescale Semiconductor 99 Figure 9. JTAG test clock input timing 12 tBSDVZ CC D TCK Falling Edge to Output Valid out of High Impedance —50 ns 13 tBSDHZ CC D TCK Falling Edge to Output High Impedance — 50 ns 14 tBSDST CC D Boundary Scan Input Valid to TCK Rising Edge 50 — ns 15 tBSDHT CC D TCK Rising Edge to Boundary Scan Input Invalid 50 — ns 1 JTAG timing specified at V DD = 1.14 V to 1.32 V, VDDEH = 4.5 V to 5.25 V with multi-voltage pads programmed to Low-Swing mode, TA = TL to TH, and CL = 30 pF with DSC = 0b10, SRC = 0b00. These specifications apply to JTAG boundary scan only. See Table 34 for functional specifications. Table 33. JTAG pin AC electrical characteristics1 (continued) # Symbol C Characteristic Min. Value Max. Value Unit TCK 1 2 2 3 3 |
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