MPC8313ECVRGDF datasheet(15/100 Pages) FREESCALE

15 / 100 page

MPC8313E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 2.1

Freescale Semiconductor

DDR and DDR2 SDRAM

Table 13 provides the DDR2 capacitance when GVDD(typ) = 1.8 V.

Table 14 provides the recommended operating conditions for the DDR SDRAM component(s) when

GVDD(typ) = 2.5 V.

Table 15 provides the DDR capacitance when GVDD(typ) = 2.5 V.

Table 13. DDR2 SDRAM Capacitance for GVDD(typ) = 1.8 V

Parameter/Condition

Symbol

Min

Max

Unit

Notes

Input/output capacitance: DQ, DQS, DQS

CIO

Delta input/output capacitance: DQ, DQS, DQS

CDIO

—0.5

Note:

1. This parameter is sampled. GVDD = 1.8 V ± 0.090 V, f = 1 MHz, TA = 25°C, VOUT = GVDD/2, VOUT (peak-to-peak) = 0.2 V.

Table 14. DDR SDRAM DC Electrical Characteristics for GVDD(typ) = 2.5 V

Parameter/Condition

Symbol

Min

Max

Unit

Notes

I/O supply voltage

GVDD

2.3

2.7

I/O reference voltage

MVREF

0.49

× GVDD

0.51

× GVDD

I/O termination voltage

VTT

MVREF – 0.04

MVREF + 0.04

Input high voltage

VIH

MVREF + 0.15

GVDD + 0.3

—

Input low voltage

VIL

–0.3

MVREF –0.15

—

Output leakage current

IOZ

–9.9

μA4

Output high current (VOUT = 1.95 V)

IOH

–16.2

—

Output low current (VOUT = 0.35 V)

IOL

16.2

—

Notes:

1. GVDD is expected to be within 50 mV of the DRAM GVDD at all times.

2. MVREF is expected to be equal to 0.5 × GVDD, and to track GVDD DC variations as measured at the receiver. Peak-to-peak

noise on MVREF may not exceed ±2% of the DC value.

3. VTT is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be

equal to MVREF. This rail should track variations in the DC level of MVREF.

4. Output leakage is measured with all outputs disabled, 0 V

≤ VOUT ≤ GVDD.

Table 15. DDR SDRAM Capacitance for GVDD(typ) = 2.5 V

Parameter/Condition

Symbol

Min

Max

Unit

Notes

Input/output capacitance: DQ, DQS

CIO

Delta input/output capacitance: DQ, DQS

CDIO

—0.5

Note:

1. This parameter is sampled. GVDD = 2.5 V ± 0.125 V, f = 1 MHz, TA =25°C, VOUT = GVDD/2, VOUT (peak-to-peak) = 0.2 V.

MPC8313ECVRGDF Datasheet(PDF) 15 Page - Freescale Semiconductor, Inc

MPC8313ECVRGDF Datasheet(HTML) 15 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

Datasheet Descarga

Enlace URL