2

Description

The Harris CD74HC165 and CD74HCT165 are 8-bit parallel

or serial-in shift registers with complementary serial outputs

load (PL) input is LOW, parallel data from the D0 to D7

inputs are loaded into the register asynchronously. When the

PL is HIGH, data enters the register serially at the DS input

each positive-going clock transition. This feature allow paral-

the DS input of the succeeding device.

For predictable operation the LOW-to-HIGH transition of CE

should only take place while CP is HIGH. Also, CP an d CE

should be LOW before the LOW-to-HIGH transition of PL to

prevent shifting the data when PL goes HIGH.

Functional Diagram

Ordering Information

PART NUMBER

TEMP. RANGE

PACKAGE

PKG. NO.

CD74HC165E

-55 to 125

16 Ld PDIP

E16.3

CD74HCT165E

-55 to 125

16 Ld PDIP

E16.3

CD74HC165M

-55 to 125

16 Ld SOIC

M16.15

CD74HCT165M

-55 to 125

16 Ld SOIC

M16.15

NOTES:

1. When ordering, use the entire part number. Add the suffix 96 to

obtain the variant in the tape and reel.

2. Wafer and die is available which meets all electrical

specifications. Please contact your local sales office or Harris

customer service for ordering information.

TRUTH TABLE

OPERATING MODE

INPUTS

OUTPUTS

PL

CE

CP

DS

D0 - D7

Parallel Load

L

X

X

X

L

L

L-L

L

H

L

XXX

H

H

H-H

H

L

Serial Shift

H

L

↑

lX

L

HL

↑

hX

H

Hold Do Nothing

H

H

X

X

X

9

7

11

12

14

4

3

13

D5

D4

D3

D2

D1

D0

5

D6

6

D7

10

DS

CE

2

PL

DATA

INPUTS

SERIAL

OUTPUTS

CP

15

1

PARALLEL

GND = 8

VCC = 16

CD74HC165, CD74HCT165