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CDC2582 Datasheet(PDF) 1 Page - Texas Instruments |
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CDC2582 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 10 page ![]() CDC2582 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH DIFFERENTIAL LVPECL CLOCK INPUTS SCAS379B – FEBRUARY 1993 – REVISED FEBRUARY 1996 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Low Output Skew for Clock-Distribution and Clock-Generation Applications D Operates at 3.3-V VCC D Distributes Differential LVPECL Clock Inputs to 12 TTL-Compatible Outputs D Two Select Inputs Configure Up to Nine Outputs to Operate at One-Half or Double the Input Frequency D No External RC Network Required D External Feedback Input (FBIN) Is Used to Synchronize the Outputs With the Clock Inputs D Application for Synchronous DRAMs D Outputs Have Internal 26-Ω Series Resistors to Dampen Transmission-Line Effects D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design Significantly Reduces Power Dissipation D Distributed VCC and Ground Pins Reduce Switching Noise D Packaged in 52-Pin Quad Flatpack PAH PACKAGE (TOP VIEW) 15 16 VCC 4Y3 GND VCC 4Y2 GND VCC 4Y1 GND GND VCC 3Y3 GND 39 38 37 36 35 34 33 32 31 30 29 28 27 17 1 2 3 4 5 6 7 8 9 10 11 12 13 GND 1Y1 VCC GND 1Y2 VCC GND 1Y3 VCC GND GND 2Y1 VCC 18 19 20 21 51 50 49 48 47 52 46 44 43 42 45 22 23 24 25 26 41 40 14 description The CDC2582 is a high-performance, low-skew, low-jitter clock driver. It uses a phase-lock loop (PLL) to precisely align the frequency and phase of the clock output signals to the differential LVPECL clock (CLKIN, CLKIN) input signals. It is specifically designed to operate at speeds from 50 MHz to 100 MHz or down to 25 MHz on outputs configured as half-frequency outputs. Each output has an internal 26- Ω series resistor that improves the signal integrity at the load. The CDC2582 operates at 3.3-V VCC. The feedback input (FBIN) synchronizes the frequency of the output clocks with the input clock (CLKIN, CLKIN) signals. One of the twelve output clocks must be fed back to FBIN for the PLL to maintain synchronization between the differential CLKIN and CLKIN inputs and the outputs. The output used as feedback is synchronized to the same frequency as the clock (CLKIN and CLKIN) inputs. Copyright © 1996, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. EPIC- ΙΙB is a trademark of Texas Instruments Incorporated. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. |
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