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TMS320F241FN Datasheet(PDF) 17 Page - Texas Instruments |
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TMS320F241FN Datasheet(HTML) 17 Page - Texas Instruments |
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17 / 116 page ![]() TMS320F243, TMS320F241 DSP CONTROLLERS SPRS064B – DECEMBER 1997 – REVISED FEBRUARY 1999 17 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 functional block diagram of the ’24x DSP controller 2 4 8 PDPINT 3 2 8 7 Quadrature Encoder Pulse (QEP) Capture/ Units Compare Timers Purpose General- Manager Event Emulation Test/ Peripheral Bus Timer Watchdog Interface Communications Serial- Interface Peripheral Serial- Converter to-Digital Analog- Single 10-Bit Data Bus 2 Module Clock Program Bus B1/B2 DARAM B0 DARAM Flash EEPROM Initialization Interrupts Control Memory† Controller Program CPU ’C2xx Shifter Product PREG TREG Multiplier Shifter Output Accumulator ALU Shifter Input Registers Mapped Memory Registers Auxiliary Registers Control Status/ ARAU Register Instruction 32‡ 4 Interrupts Resets General- Purpose I/O Pins 2 CAN Module 16 16 † ’F243 only ‡ 26 in ’F241 |
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