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PCM5310PAPR Datasheet(PDF) 29 Page - Texas Instruments |
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PCM5310PAPR Datasheet(HTML) 29 Page - Texas Instruments |
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29 / 103 page ![]() 0.5V DD 0.5V DD LRCKx (Output) BCKx (Output) 0.5V DD 1.4V t BCH t DOD DATAx (1) (OutputMode) DATAx (InputMode) t BCL t BCY t LRD t DIS t DIH PCM5310 www.ti.com ............................................................................................................................................................................................ SLES244 – FEBRUARY 2009 (1) Load capacitance of output is 20 pF. Figure 36. Audio Interface Timing (Master Mode) Table 13. Timing Requirements for Figure 36 PARAMETER MIN TYP MAX UNIT tBCY BCKx cycle time 1/(64 fS) tBCH BCKx pulse width high 0.4 tBCY 0.5 tBCY 0.6 tBCY tBCL BCKx pulse width low 0.4 tBCY 0.5 tBCY 0.6 tBCY tLRD LRCKx delay time from BCKx falling edge –15 20 ns tDIS DATAx setup time to BCKx rising edge 10 ns tDIH DATAx hold time to BCKx rising edge 10 ns tDOD DATAx delay time from BCKx falling edge –10 20 ns Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 29 Product Folder Link(s): PCM5310 |
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