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MCP6141-E/ST Datasheet(PDF) 19 Page - Microchip Technology

No. de pieza MCP6141-E/ST
Descripción Electrónicos  600 nA, Non-Unity Gain Rail-to-Rail Input/Output Op Amps
PDF  38 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP6141-E/ST Datasheet(HTML) 19 Page - Microchip Technology

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© 2009 Microchip Technology Inc.
DS21668D-page 19
MCP6141/2/3/4
4.9
Application Circuits
4.9.1
BATTERY CURRENT SENSING
The MCP6141/2/3/4 op amps’ Common Mode Input
Range, which goes 0.3V beyond both supply rails,
supports their use in high side and low side battery
current sensing applications. The very low quiescent
current (0.6 µA, typical) help prolong battery life, and
the rail-to-rail output supports detection low currents.
Figure 4-10 shows a high side battery current sensor
circuit. The 1 k
Ω resistor is sized to minimize power
losses. The battery current (IDD) through the 1 kΩ
resistor causes its top terminal to be more negative
than the bottom terminal. This keeps the common
mode input voltage of the op amp below VDD, which is
within its allowed range. When no current is flowing, the
output will be at its Maximum Output Voltage Swing
(VOH), which is virtually at VDD.
.
FIGURE 4-10:
High Side Battery Current
Sensor.
4.9.2
INVERTING SUMMING AMPLIFIER
The MCP6141/2/3/4 op amp is well suited for the
inverting summing amplifier shown in Figure 4-11 when
the resistors at the input (R1, R2, and R3) make the
noise gain at least 10 V/V. The output voltage (VOUT) is
a weighted sum of the inputs (V1, V2, and V3), and is
shifted by the VREF input. The necessary calculations
follow in Equation 4-3.
.
FIGURE 4-11:
Summing Amplifier.
EQUATION 4-3:
VDD
IDD
MCP6141
100 k
Ω
1M
Ω
1.4V
VOUT
1k
Ω
to
6.0V
V
OUT
V
DD
1 k
Ω
() 11 V/V
()I
DD
–
=
MCP614X
VOUT
RF
R3
V3
R2
V2
R1
V1
VREF
G
N
1R
F
1
R
1
------
1
R
2
------
1
R
3
------
++
⎝⎠
⎛⎞
10 V/V
≥
+
=
Noise Gain:
Output Signal:
V
OUT
V
1G1
V
2G2
V
3G3
V
REFGN
+++
=
G
1
R
F R1
⁄
–
=
Signal Gains:
G
2
R
F R2
⁄
–
=
G
3
R
F R3
⁄
–
=



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