| Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
AT25DF161 Datasheet(PDF) 39 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
AT25DF161 Datasheet(HTML) 39 Page - ATMEL Corporation |
|
39 / 60 page ![]() 39 3687C–DFLASH–7/09 AT25DF161 [Preliminary] The RSTE bit will retain its state as long as power is applied to the device. Once set to the logi- cal “1” state, the RSTE bit will remain in that state until it is modified using the Write Status Register Byte 2 command or until the device has been power cycled. The Reset command itself will not change the state of the RSTE bit. 11.1.7 SLE Bit The SLE bit is used to enable and disable the Sector Lockdown and Freeze Sector Lockdown State commands. When the SLE bit is in the logical “0” state (the default state after power-up), the Sector Lockdown and Freeze Sector Lockdown commands are disabled. If the Sector Lock- down and Freeze Sector Lockdown commands are disabled, then any attempts to issue the commands will be ignored. This provides a safeguard for these commands against accidental or erroneous execution. When the SLE bit is in the logical “1” state, the Sector Lockdown and Freeze Sector Lockdown State commands are enabled. Unlike the WEL bit, the SLE bit does not automatically reset after certain device operations. Therefore, once set, the SLE bit will remain in the logical “1” state until it is modified using the Write Status Register Byte 2 command or until the device has been power cycled. The Reset command has no effect on the SLE bit. If the Freeze Sector Lockdown State command has been issued, then the SLE bit will be perma- nently reset in the logical “0” state to indicate that the Sector Lockdown command has been disabled. 11.1.8 PS Bit The PS bit indicates whether or not a sector is in the Program Suspend state. 11.1.9 ES Bit The ES bit indicates whether or not a sector is in the Erase Suspend state. 11.1.10 RDY/BSY Bit The RDY/BSY bit is used to determine whether or not an internal operation, such as a program or erase, is in progress. To poll the RDY/BSY bit to detect the completion of a program or erase cycle, new Status Register data must be continually clocked out of the device until the state of the RDY/BSY bit changes from a logical “1” to a logical “0”. Figure 11-1. Read Status Register SCK CS SI SO MSB 23 1 0 00000101 67 5 410 11 9 812 21 22 17 20 19 18 15 16 13 14 23 24 28 29 27 26 25 30 OPCODE MSB MSB DDDDDD D D D D MSB DDDDD D D D DD D D D D STATUS REGISTER BYTE 1 STATUS REGISTER BYTE 1 STATUS REGISTER BYTE 2 HIGH-IMPEDANCE |
|
Enlace URL |
| ¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Enlace a la hoja de datos | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |