M306S0FADGP datasheet(49/208 Pages) RENESAS

49 / 208 page

Rev.5.01

Dec 10, 2009

page 49 of 201

REJ03B0014-0501

M16C/6S Group

Hardware Interrupts

Hardware interrupts are classified into two types — special interrupts and peripheral function interrupts.

(1) Special Interrupts

Special interrupts are non-maskable interrupts.

________

• DBC Interrupt

Do not normally use this interrupt because it is provided exclusively for use by development support

tools.

• Watchdog Timer Interrupt

Generated by the watchdog timer. Once a watchdog timer interrupt is generated, be sure to initialize

the watchdog timer. For details about the watchdog timer, refer to the section "watchdog timer".

• Oscillation Stop and Re-oscillation Detection Interrupt

Generated by the oscillation stop and re-oscillation detection function. For details about the oscilla-

tion stop detection function, refer to the section "clock generating circuit".

• Single-step Interrupt

Do not normally use this interrupt because it is provided exclusively for use by development support

tools.

• Address Match Interrupt

An address match interrupt is generated immediately before executing the instruction at the address

indicated by the RMAD0 to RMAD3 register that corresponds to one of the AIER register’s AIER0 or

AIER1 bit or the AIER2 register’s AIER20 or AIER21 bit which is "1" (address match interrupt en-

abled). For details about the address match interrupt, refer to the section "address match interrupt".

(2) Peripheral Function Interrupts

Peripheral function interrupts are maskable interrupts and generated by the microcomputer's internal

functions. The interrupt sources for peripheral function interrupts are listed in Table 1.9.1. For details

about the peripheral functions, refer to the description of each peripheral function in this manual.

Interrupts

M306S0FADGP Datasheet(PDF) 49 Page - Renesas Technology Corp