DM9161B datasheet(3/45 Pages) DAVICOM

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DM9161B

10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver

Final

Version: DM9161B-12-DS-F01

October 16, 2009

1. General Description

DAVICOM’s DM9161B is a physical layer, single-chip,

and low power 100BASE-TX/10BASE-T transceiver

specifically designed for consumer electronics, industrial and

enterprise applications. For the media usage, it provides

a direct interface either to Unshielded Twisted Pair

Category 5 Cable (UTP5) for 100BASE-TX Fast

Ethernet, or UTP5/UTP3 Cable for 10BASE-T

Ethernet.

Through the Media Independent Interface (MII),

DM9161B not only connects the Medium Access

Control (MAC) layer but also ensur a high inter

operability from different vendors.

TheDM9161B uses a CMOS process which has

advantages of power consumption saving and high

performance .

It contains the entire physical layer functions of

100BASE-TX which is defined by IEEE802.3u,

including the Physical Coding Sub layer (PCS),

Physical Medium Attachment (PMA), Twisted Pair

Physical Medium Dependent Sub layer (TP-PMD),

10BASE-TX Encoder/Decoder (ENC/DEC), and

Twisted Pair Media Access Unit (TPMAU).

The DM9161B provides a strong support for the

auto-negotiation function, utilizing automatic media

speed and protocol selection. In the bargain, , the

DM9161B needs no external filter to transport signals

to the media in 100BASE-TX or 10BASE-T Ethernet

operation because of the built-in wave shaping filter..

2. Features

Fully comply with IEEE 802.3 / IEEE 802.3u 10Base-T/

100Base-TX, ANSI X3T12 TP-PMD 1995 standard

Support HP MDI/MDI-X auto crossover function

(HP Auto-MDIX)

Support Auto-Negotiation function, compliant with IEEE

802.3u

Fully integrated Physical layer transceiver On-chip

filtering with direct interface to magnetic transformer

Selectable repeater or node mode

Selectable MII or RMII (Reduced MII) mode for

100Base-TX and 10Base-TX. Selectable MII or GPSI

(7-Wired) mode for 10Base-T

Selectable full-duplex or half-duplex operation

MII management interface with maskable interrupt

output capability

Provide Loopback mode for easy system

diagnostics

LED status outputs indicate Link/ Activity, Speed10/100

and Full-duplex/Collision. Support Dual-LED optional

control

Single low power Supply of 3.3V with an advanced

CMOS technology

Lower Power consumption modes:

● Power Reduced mode (cable detection)

● Power Down mode

● Selectable TX drivers for 1:1 or 1.25:1 transformers

for additional power reduction. 1: 1 transformers only

when HP Auto-MDIX Enable.

Compatible with 3.3V and 5.0V tolerant I/Os

Pin to pin Compatible with DM9161A.

DSP architecture PHY Transceiver.

48-pin LQFP 0.18um process

DM9161B Datasheet(PDF) 3 Page - Davicom Semiconductor, Inc.

DM9161B Datasheet(HTML) 3 Page - Davicom Semiconductor, Inc.

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