t

fs

IN

OUT

0V

or

V

1

CC

V

1

CC

V

I

C

L

NOTEB

V

O

V

I

V

O

50%

V

1

CC

0V

V

OH

V

OL

2.7V

fslow

V O

Input

Generator

50 W

OUT

DISABLE

VI

IN

0 V

VO

V I

VCC2/2

50 %

50 %

VO

Input

Generator

50 W

OUT

DISABLE

V O

V I

IN

0 V

C L

wake

t

VCC2/2

( Note A)

( Note A )

C L

( NoteB )

(NoteB )

VCC2

VCC2

VCC 2

VCC2

0 V

0 V

0 V

0 V

NOTE:Whichevertestyieldsthelongesttimeisusedinthisdatasheet

VI

CTRL

3 V

CTRL

3 V

ISO7240CF, ISO7240C, ISO7240M

ISO7241C, ISO7241M

ISO7242C, ISO7242M

www.ti.com

SLLS868L – SEPTEMBER 2007 – REVISED JANUARY 2010

PARAMETER MEASUREMENT INFORMATION (continued)

A.

B.

The input pulse is supplied by a generator having the following characteristics: PRR

Figure 3. Failsafe Delay Time Test Circuit and Voltage Waveforms

A.

Whichever test yields the longest time is used in this data sheet.

Figure 4. Wake Time From Input Disable Test Circuit and Voltage Waveforms

Copyright © 2007–2010, Texas Instruments Incorporated

Submit Documentation Feedback

13

Product Folder Link(s): ISO7240CF ISO7240C ISO7240M ISO7241C ISO7241M ISO7242C ISO7242M