68HC05P9A_1 datasheet(7/90 Pages) FREESCALE

7 / 90 page

GENERAL RELEASE SPECIFICATION

Rev. 2.0

vii

LIST OF FIGURES

Figure

Title

Page

1-1

Block Diagram ........................................................................................... 1-3

1-2

Pin Assignments ........................................................................................ 1-4

1-3

Port A Pullup Option .................................................................................. 1-5

1-4

I/O Circuitry ................................................................................................ 1-7

2-1

Memory Map .............................................................................................. 2-1

2-2

I/O Registers for the MC68HC05P9A ........................................................ 2-2

4-1

Hardware Interrupt Flowchart .................................................................... 4-3

4-2

IRQ Function Block Diagram ...................................................................... 4-4

5-1

Power-On Reset and RESET .................................................................... 5-2

6-1

STOP/WAIT Flowcharts ............................................................................. 6-3

7-1

SIOP Block Diagram .................................................................................. 7-1

7-2

Serial I/O Port Timing ................................................................................ 7-2

7-3

SIOP Control Register ............................................................................... 7-3

7-4

SIOP Status Register ................................................................................. 7-4

7-5

SIOP Data Register ................................................................................... 7-5

8-1

Timer Block Diagram ................................................................................. 8-2

8-2

Timer Control Register ............................................................................... 8-5

8-3

Timer Status Register ................................................................................ 8-6

10-1

A/D Status and Control Register (ADSCR)............................................... 10-2

10-2

A/D Data Register (ADDR) ....................................................................... 10-3

11-1

Self-Check Circuit .................................................................................... 12-2

13-1

SIOP Timing Diagram .............................................................................. 13-5

13-2

STOP Recovery Timing ........................................................................... 13-7

13-3

External Interrupt Timing ......................................................................... 13-7

13-4

Power-On Reset Timing .......................................................................... 13-8

13-5

External Reset Timing ............................................................................. 13-8

Freescale Semiconductor, Inc.

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