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LIS331DLH Datasheet(PDF) 33 Page - STMicroelectronics |
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LIS331DLH Datasheet(HTML) 33 Page - STMicroelectronics |
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33 / 38 page ![]() LIS331DLH Register description Doc ID 15094 Rev 3 33/38 Interrupt 1 source register. Read only register. Reading at this address clears INT1_SRC IA bit (and the interrupt signal on INT 1 pin) and allows the refreshment of data in the INT1_SRC register if the latched option was chosen. 7.15 INT1_THS (32h) 7.16 INT1_DURATION (33h) D6 - D0 bits set the minimum duration of the Interrupt 2 event to be recognized. Duration steps and maximum values depend on the ODR chosen. 7.17 INT2_CFG (34h) Table 42. INT1_THS register 0 THS6 THS5 THS4 THS3 THS2 THS1 THS0 Table 43. INT1_THS description THS6 - THS0 Interrupt 1 threshold. Default value: 000 0000 Table 44. INT1_DURATION register 0 D6D5D4 D3 D2D1 D0 Table 45. INT2_DURATION description D6 - D0 Duration value. Default value: 000 0000 Table 46. INT2_CFG register AOI 6D ZHIE ZLIE YHIE YLIE XHIE XLIE Table 47. INT2_CFG description AOI AND/OR combination of interrupt events. Default value: 0. (See table below) 6D 6 direction detection function enable. Default value: 0. (See table below) ZHIE Enable interrupt generation on Z high event. Default value: 0 (0: disable interrupt request; 1: enable interrupt request on measured accel. value higher than preset threshold) ZLIE Enable interrupt generation on Z low event. Default value: 0 (0: disable interrupt request; 1: enable interrupt request on measured accel. value lower than preset threshold) |
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