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STM8L15 Datasheet(PDF) 103 Page - STMicroelectronics |
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STM8L15 Datasheet(HTML) 103 Page - STMicroelectronics |
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103 / 122 page ![]() STM8L151xx, STM8L152xx Electrical parameters Doc ID 15962 Rev 5 103/122 fCONV 12-bit conversion rate VAIN on PF0 fast channel 1(4)(5) MHz VAIN on all other channels 760(4)(5) kHz fTRIG External trigger frequency tconv 1/fADC tLAT External trigger latency 3.5 1/fSYSCLK tS Sampling time VAIN on PF0 fast channel VDDA < 2.4 V 0.43(4)(5) µs VAIN on PF0 fast channel 2.4 V ≤VDDA≤ 3.6 V 0.22(4)(5) µs VAIN on slow channels VDDA < 2.4 V 0.86(4)(5) µs VAIN on slow channels 2.4 V ≤VDDA≤ 3.6 V 0.41(4)(5) µs tconv 12-bit conversion time 12 + tS 1/fADC 16 MHz 1(4) µs tWKUP Wakeup time from OFF state 3µs tIDLE (6) Time before a new conversion TA = +25 °C 1 s TA = +70 °C 20 ms TA = +125 °C 2 ms tVREFINT Internal reference voltage startup time refer to Table 44 ms 1. Data guaranteed by design, not tested in production. 2. The current consumption through VREF is composed of two parameters: - one constant (max 300 µA) - one variable (max 400 µA), only during sampling time + 2 first conversion pulses. So, peak consumption is 300+400 = 700 µA and average consumption is 300 + [(4 sampling + 2) /16] x 400 = 450 µA at 1Msps 3. VREF- or VDDA must be tied to ground. 4. Minimum sampling and conversion time is reached for maximum Rext = 0.5 k Ω.. 5. Value obtained for continuous conversion on fast channel. 6. The time between 2 conversions, or between ADC ON and the first conversion must be lower than tIDLE. Table 51. ADC1 characteristics (continued) Symbol Parameter (1) Conditions Min (1) Typ(1) Max(1) Unit |
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