HT48R005 datasheet(25/62 Pages) HOLTEK

25 / 62 page

HT48R005/HT46R005

Rev. 1.00

November 29, 2011

For applications that operate within an environment

where more noise is present the Enhanced Reset Cir-

cuit shown is recommended.

More information regarding external reset circuits is

located in Application Note HA0075E on the Holtek

website.

· RES Pin Reset

This type of reset occurs when the microcontroller is

already running and the RES pin is forcefully pulled

low by external hardware such as an external switch.

In this case as in the case of other reset, the Program

Counter will reset to zero and program execution initi-

ated from this point.

· Low Voltage Reset

- LVR

The microcontroller contains a low voltage reset cir-

cuit in order to monitor the supply voltage of the de-

vice. The LVR function is selected via a configuration

option. If the supply voltage of the device drops to

within a range of 0.9V~VLVR such as might occur when

changing the battery, the LVR will automatically reset

the device internally. For a valid LVR signal, a low sup-

ply voltage, i.e., a voltage in the range between

0.9V~VLVR must exist for a time greater than that spec-

ified by tLVR in the A.C. characteristics. If the low sup-

ply voltage state does not exceed this value, the LVR

will ignore the low supply voltage and will not perform

a reset function. The actual VLVR value can be se-

lected via configuration options.

· Watchdog Time-out Reset during Normal Operation

The Watchdog time-out Reset during normal opera-

tion is the same as a hardware RES pin reset except

that the Watchdog time-out flag TO will be set to

²1².

· Watchdog Time-out Reset during Sleep mode

The Watchdog time-out Reset during Sleep mode is a

little different from other kinds of reset. Most of the

conditions remain unchanged except that the Pro-

gram Counter and the Stack Pointer will be cleared to

²0² and the TO flag will be set to ²1². Refer to the A.C.

Characteristics for tSST details.

Note:

If the system clock source is provided by ERC

or HIRC, the tSST is 2 clock cycles.

If the system clock source is provided by HXT,

the tSST is 128 clock cycles.

Reset Initial Conditions

The different types of reset described affect the reset

flags in different ways. These flags, known as PDF and

TO are located in the status register and are controlled

by various microcontroller operations, such as the Sleep

function or Watchdog Timer. The reset flags are shown

in the table:

PDF

RESET Conditions

Power-on reset

RES or LVR reset during Normal Mode

operation

WDT time-out reset during Normal Mode

operation

WDT time-out reset during Sleep Mode

operation

Note:

²u² stands for unchanged

t S S T

W D T T i m e - o u t

I n t e r n a l R e s e t

WDT Time-out Reset during Sleep

Timing Chart

L V R

I n t e r n a l R e s e t

t R S T D + t S S T

Note: tRSTD is power-on delay, typical time=100ms

Low Voltage Reset Timing Chart

t R S T D + t S S T

W D T T i m e - o u t

I n t e r n a l R e s e t

Note: tRSTD is power-on delay, typical time=100ms

WDT Time-out Reset during Normal Operation

Timing Chart

R E S / P A 7

0 . 1 ~ 1 m F

1 0 k W ~

1 0 0 k W

V D D

V S S

0 . 0 1 m F * *

V D D

1 N 4 1 4 8 *

3 0 0 W *

Note:

²*² It is recommended that this component is

added for added ESD protection

²**² It is recommended that this component is

added in environments where power line noise

is significant

External RES Circuit

R E S

I n t e r n a l R e s e t

0 . 9 V D D

0 . 4 V D D

t R S T D + t S S T

Note: tRSTD is power-on delay, typical time=100ms

RES Reset Timing Chart

HT48R005 Datasheet(PDF) 25 Page - Holtek Semiconductor Inc

HT48R005 Datasheet(HTML) 25 Page - Holtek Semiconductor Inc

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