ADP2164

Data Sheet

Rev. 0 | Page 6 of 20

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

12

11

10

1

3

4

PVIN

NOTES

1. THE EXPOSED PAD SHOULD BE SOLDERED

TO AN EXTERNAL GROUND PLANE UNDER

THE IC FOR THERMAL DISSIPATION.

SW

SW

9

SW

SYNC

TRK

2

RT

FB

ADP2164

TOP VIEW

(Not to Scale)

Figure 3. Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

SYNC

Synchronization Input. To synchronize the switching frequency to an external clock, connect this pin to an

external clock with a frequency of 500 kHz to 1.4 MHz (see the Oscillator and Synchronization section for

more information).

2

RT

Frequency Setting. To select a switching frequency of 600 kHz, connect this pin to GND; to select a switching

frequency of 1.2 MHz, connect this pin to VIN. To program the frequency from 500 kHz to 1.4 MHz, connect a

resistor from this pin to GND (see the Oscillator and Synchronization section for more information).

3

TRK

Tracking Input. To track a master voltage, connect the TRK pin to a voltage divider from the master voltage. If

the tracking function is not used, connect the TRK pin to VIN. For more information, see the Voltage Tracking

section.

4

FB

5

GND

Analog Ground. Connect to the ground plane.

6, 7, 8

PGND

Power Ground. Connect to the ground plane and to the output return side of the output capacitor.

9, 10, 11

SW

Switch Node Output. Connect to the output inductor.

12, 13

PVIN

Power Input Pin. Connect this pin to the input power source. Connect a bypass capacitor between this pin

and PGND.

14

VIN

Bias Voltage Input Pin. Connect a bypass capacitor between this pin and GND; connect a small (10 Ω) resistor

between this pin and PVIN.

15

EN

Precision Enable Pin. The external resistor divider can be used to set the turn-on threshold. To enable the

part automatically, connect the EN pin to VIN. This pin has a 1 MΩ pull-down resistor to GND.

16

PGOOD

Power-Good Output (Open Drain). Connect this pin to a resistor from any pull-up voltage lower than 6.5 V.

17 (EPAD)

Exposed Pad

The exposed pad should be soldered to an external ground plane under the IC for thermal dissipation.