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Analog Integrated Circuit Device Data



Freescale Semiconductor

33813

5.3.6.3

Watchdog SPI Configuration Register

There are seven bits in the watchdog SPI configuration register which define the time value that is loaded into the watchdog timer.

Bits 3, 2, 1, 0 are a Binary coded decimal (BCD) value from 1 to 10. (11 to 16 are mapped to 10 and 0 is mapped to 1) The

remaining three bits, 6, 5, and 4 are the time multiplier values. There are three time multiplier values so only one bit, 6, 5, or 4

may be set at one time. Setting more than one bit will result in the highest multiplier value getting precedence.

Bit 7 is the watchdog enable(1) or disable(0) bit.

The time multipliers are as follows:

Bit 6 = x1 seconds (s)

Bit 5 = x 100 milliseconds (ms)

Bit 4 = x 10 milliseconds (ms)

The register in Table 15 shows the watchdog enabled and the time value of 10 seconds. Using this technique, time values from

1.0 ms. to 10 seconds can be programmed into the watchdog.

5.3.6.4

Watchdog SPI Control Register

The watchdog relies on Bit 7 of the watchdog SPI control register being written as a one (1) to refresh the watchdog timer (i.e.

reload the time value from the watchdog SPI configuration register). The watchdog SPI control register can also be loaded with

a time value to temporarily set a different value in the watchdog timer for the next cycle.

When Bits 6 thru 0 in the watchdog SPI control register are zero, the value stored in the watchdog SPI configuration register will

be loaded into the watchdog timer. If there is a temporary time value written into the watchdog SPI control register then that value

will be loaded into the watchdog. Since the watchdog SPI control register is automatically cleared to zero when the watchdog

timer is loaded, the next watchdog timer load will be from the value stored in the watchdog SPI configuration register, unless a

new temporary time value is again written to the watchdog SPI Control Register.

Example:

To enable and set the watchdog for a timeout value of 200 ms, the MCU will write the following byte into the watchdog SPI

configuration register:

In the main loop of the MCU’s program there will be a call to a routine to write the following byte into the watchdog SPI Control

Table 15. Watchdog SPI Configuration Register

Enable/Disable

x1 sec.

x100 ms.

x10 ms.

Table 16. Watchdog SPI Control Register

Refresh

x1 sec.

x100 ms.

x10 ms.

Table 17. Watchdog SPI Configuration Register

Enable/Disable

x1 sec.

x100 ms.

x10 ms.

Table 18. Watchdog SPI Control Register

WD Refresh

x1 sec.

x100 ms.

x10 ms.

33813 Datasheet(PDF) 39 Page - Freescale Semiconductor, Inc

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