DESCRIPTION

f

=

XTAL

OutputDivider

FeedbackDivider

(1)

LoopFilter

Feedback

Divider

12,16,20,and32

Crystal

Oscillator

PFD

ChargePump

XIN1

XIN2

VCO1

1894

VCO2

2157

Prescaler

2,3,4,and5

OutputDivider

1,2,4,8,16,and32

EEPROM

1-PinInterface

and

Control

CE

Program

LVPECL

LVDS

CDCE421A

CDCE421A

The CDCE421A is a high-performance, low phase noise clock generator. It has two fully-integrated, low-noise,

also features an integrated crystal oscillator that operates in conjunction with an external AT-cut crystal to

produce a stable frequency reference for the phase-locked loop (PLL) based frequency synthesizer.

and VCO selection. To calculate the exact crystal oscillator frequency required for the desired output, use the

formula in Equation 1.

Where:

In the CDCE421A, the feedback divider is set automatically with respect to the prescaler setting. The product of

the prescaler and the feedback divider should be between 60 and 64 as shown in Table 2 to maintain a stable

control loop.

Figure 1 shows a high-level block diagram of the device. The CDCE421A supports one differential LVDS clock

output or one differential LVPECL output. All device settings are programmable through a proprietary simple

serial interface (SSI).

The device operates in 3.3-V supply environment for both LVPECL and LVDS outputs and is characterized for

operation from –40°C to +85°C. The CDCE421A is available in a QFN-24 4-mm × 4-mm package.

CDCE421 Users:

The CDCE421A provides several device enhancements to the CDCE421. For a complete description of

differences between these products, refer to Appendix C: Application Information.

Figure 1. Functional Block Diagram

(1)

Output divider and feedback divider should be from the same row in Table 2.

(2)

Feedback divider is set automatically with respect to the prescaler setting in Table 2.

2

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Product Folder Link(s): CDCE421A