MLZ2012A3R3W datasheet(15/68 Pages) TI1

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ADS1299EEG-FE Daughter Card Hardware Introduction

Table 2. Power Supply Test Points

Test Point

Voltage

TP7

+5.0V

TP9

+1.8V

TP10

+3.3V

TP5

+5.0V

TP13

+2.5V

TP6

–2.5V

TP8

GND

The front-end board must be properly configured in order to achieve the various power-supply schemes.

The default power-supply setting for the ADS1299EEG-FE is a unipolar analog supply of 5V and DVDD of

either +3V or +1.8V. Table 3 shows the board and component configurations for each analog power-

supply scheme; Table 4 shows the board configurations for the digital supply.

Table 3. Analog Supply Configurations

Unipolar Analog Supply

Bipolar Analog Supply

Power Supplies

±2.5V

JP2 (AVDD)

2-3 (default)

1-2

JP20 (AVSS)

1-2 (default)

2-3

Don’t Care

TPS72325

Don’t Care

TPS73225

Table 4. Digital Supply Configurations

DVDD

+3.0V

+1.8V

JP24

2-3 (default)

1-2

4.2

Clock

The ADS1299 has an on-chip oscillator circuit that generates a 2.048MHz clock (nominal). This clock can

vary by ±5% over temperature. For applications that require higher accuracy, the ADS1299 can also

accept an external clock signal. The ADS1299EEG-FE provides an option to test both internal and

external clock configurations. It also provides an option to generate the external clock from either the

onboard oscillator or from an external clock source.

The onboard oscillator is powered by the DVDD supply of the ADS1299. Care must be taken to ensure

that the external oscillator can operate either with +1.8V or +3.0V, depending on the DVDD supply

configuration. Table 5 shows the jumper settings for the three options for the ADS1299 clocks.

Table 5. Clock Jumper Options

ADS1299 Clock

Internal Clock from the ADS1299

Clock from Oscillator on the EVM

External Clock Source

JP18

Not Installed

2-3 (default)

1-2

JP19

Don’t Care

1-2

Don’t Care

J3– pin 17

Don’t Care

External Clock Source

SLAU443 – May 2012

EEG Front-End Performance Demonstration Kit

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