ADG5433/ADG5434

Data Sheet

Rev. B | Page 10 of 24

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

S1A

D1

S1B

S2A

D2

S2B

IN1

EN

S3A

IN2

IN3

D3

S3B

GND

ADG5433

TOP VIEW

(Not to Scale)

Figure 3. ADG5433 TSSOP Pin Configuration

1

D1

2

S1B

3

S2B

4

D2

12 EN

10 S3B

9

D3

NOTES

TOP VIEW

(Not to Scale)

ADG5433

Figure 4. ADG5433 LFCSP_WQ Pin Configuration

Table 8. ADG5433 Pin Function Descriptions

Pin No.

Mnemonic

Description

TSSOP

LFCSP_WQ

1

15

Most Positive Power Supply Potential.

2

16

S1A

Source Terminal 1A. This pin can be an input or an output.

3

1

D1

Drain Terminal 1. This pin can be an input or an output.

4

2

S1B

Source Terminal 1B. This pin can be an input or an output.

5

3

S2B

Source Terminal 2B. This pin can be an input or an output.

6

4

D2

Drain Terminal 2. This pin can be an input or an output.

7

5

S2A

Source Terminal 2A. This pin can be an input or an output.

8

6

IN2

Logic Control Input 2.

9

7

IN3

Logic Control Input 3.

10

8

S3A

Source Terminal 3A. This pin can be an input or an output.

11

9

D3

Drain Terminal 3. This pin can be an input or an output.

12

10

S3B

Source Terminal 3B. This pin can be an input or an output.

13

11

Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to

ground.

14

12

EN

Active Low Digital Input. When high, the device is disabled and all switches are off. When low, INx

logic inputs determine the on switches.

15

13

IN1

Logic Control Input 1.

16

14

GND

Ground (0 V) Reference.

EP

Exposed

Pad

The exposed pad is connected internally. For increased reliability of the solder joints and maximum

Table 9. ADG5433 Truth Table

EN

INx

SxA

SxB

1

X

Off

Off

0

0

Off

On

0

1

On

Off