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LC72720YV Datasheet(PDF) 2 Page - Sanyo Semicon Device

No. de pieza LC72720YV
Descripción Electrónicos  Single-Chip RDS Signal-Processing System IC
PDF  18 Pages
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Fabricante Electrónico  SANYO [Sanyo Semicon Device]
Página de inicio  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LC72720YV Datasheet(HTML) 2 Page - Sanyo Semicon Device

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LC72720YV
No. 6488-2/18
Specifications
Absolute Maximum Ratings at Ta = 25
C, Vssd = Vssa = 0V
Parameter
Symbol
Pin Name
Ratings
Unit
Maximum supply voltage
Vddmax
Vddd, Vdda
-0.3 to +7.0
V
Maximum input voltage
Vin1max
CL, DI, CE, SYR, T1, T2, T3, T4, T5, T6, T7, SYNC
-0.3 to +7.0
V
Vin2max
XIN
-0.3 to Vddd+0.3
V
Vin3max
MPXIN, CIN
-0.3 to Vdda+0.3
V
Maximum output voltage
Vo1max
DO, SYNC, RDS-ID, T3, T4, T5, T6, T7
-0.3 to +7.0
V
Vo2max
XOUT
-0.3 to Vddd+0.3
V
Vo3max
FLOUT
-0.3 to Vdda+0.3
V
Maximum output current
Io1max
DO, T3, T4, T5, T6, T7
+6.0
mA
Io2max
XOUT, FLOUT
+3.0
mA
Io3max
SYNC, RDS-ID
+20.0
mA
Allowable power dissipation
Pdmax
(Ta
85C)
150
mW
Operating temperature
Topr
-40 to +85
C
Storage temperature
Tstg
-55 to +125
C
Allowable Operating Ranges at Ta = -40 to 85
C, Vssd = Vssa = 0V
Parameter
Symbol
Pin Name
Conditions
Ratings
Unit
min
typ
max
Supply voltage
Vdd1
Vddd, Vdda
3.0
3.6
V
Vdd2
Vddd
Serial data hold voltage
2.0
V
Input high-level
voltage
VIH
CL, DI, CE, SYR, T1, T2
0.7Vddd
6.5
V
Input low-level
voltage
VIL
CL, DI, CE, SYR, T1, T2
0
0.3Vddd
V
Output voltage
VO
DO, SYNC, RDS-ID, T3,
T4, T5, T6, T7
6.5
V
Input amplitude
VIN1
MPXIN
f=57
2kHz
50
mVrms
VIN2
100% modulation composite
100
mVrms
VXIN
XIN
400
1500
mVrms
Guaranteed crystal
Oscillator
frequencies
XTAL
XIN, XOUT
CI
120 (XS=0)
4.332
MHz
CI
70 (XS=1)
8.664
MHz
Crystal oscillator
frequency
deviation
TXtal
XIN, XOUT
fo=4.332MHz, 8.664MHz
100
ppm
Data setup time
tSU
DI, CL
0.75
s
Data hold time
tHD
DI, CL
0.75
s
Clock low level time
tCL
CL
0.75
s
Clock high level
time
tCH
CL
0.75
s
CE wait time
tEL
CE, CL
0.75
s
CE setup time
tES
CE, CL
0.75
s
CE hold time
tEH
CE, CL
0.75
s
CE high-level time
tCE
CE
20
ms
Data latch change
time
tLC
1.15
s
Data output time
tDC
DO,CL
Differs depending on the value
of the pull-up resistor used.
0.46
s
tDH
DO,CE
0.46
s



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