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AD688 Datasheet(PDF) 5 Page - Analog Devices

No. de pieza AD688
Descripción Electrónicos  High Precision -10 V Reference
PDF  8 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

AD688 Datasheet(HTML) 5 Page - Analog Devices

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AD688
REV. A
–5–
If further noise reduction is desired, an optional capacitor may
be added between the NOISE REDUCTION pin and ground as
shown in Figure 2b. This will form a low pass filter with the
5k
Ω R
B on the output of the Zener cell. A 1
µF capacitor will
have a 3 dB point at 32 Hz and will reduce the high frequency
noise (to 1 MHz) to about 250
µV p-p. Figure 4 shows the 1 MHz
noise of a typical AD688 both with and without a 1
µF capacitor.
Figure 4. Effect of 1
µF Noise Reduction Capacitor on
Broadband Noise
TURN-ON TIME
Upon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error is
the turn-on settling time. Two components normally associated
with this are: time for active circuits to settle and time for ther-
mal gradients on the chip to stabilize. Figure 5 shows the turn-
on characteristics of the AD688. It shows the settling time to be
about 600
µs. Note the absence of any thermal tails when the
horizontal scale is expanded to 2 ms/cm in Figure 5b.
a. Electrical Turn-On
b. Extended Time Scale
Figure 5. Turn-On Characteristics
Output turn-on time is modified when an external noise reduc-
tion capacitor is used. When present, this capacitor presents an
additional load to the internal Zener diode’s current source,
resulting in a somewhat longer turn-on time. In the case of a
1
µF capacitor, the initial turn-on time is approximately 100 ms
(see Figure 6).
When the NOISE REDUCTION feature is used, a 20 k
resistor between Pins 6 and 2 is required for proper startup.
Figure 6. Turn-On With 1
µF C
N
TEMPERATURE PERFORMANCE
The AD688 is designed for precision reference applications
where temperature performance is critical. Extensive tempera-
ture testing ensures that the device’s high level of performance is
maintained over the operating temperature range.
Figure 7 shows the typical output voltage drift for the
AD688SQ and illustrates the test methodology. The box in Fig-
ure 7 is bounded on the sides by the operating temperature
extremes and on top and bottom by the maximum and
minimum +10 V output error voltages measured over the
operating temperature range. The slopes of the diagonals drawn
for both the +10 V and –10 V outputs determine the perform-
ance grade of the device.
Figure 7. Typical AD688SQ Temperature Drift
Each AD688A and B grade unit is tested at –40
°C, –25°C, 0°C,
+25
°C, +50°C, +70°C and +85°C. Each AD688S grade unit is
tested at –55
°C, –25°C, +25°C, +70°C and +125°C. This
approach ensures that the variations of output voltage that occur
as the temperature changes within the specified range will be
contained within a box whose diagonal has a slope equal to the
maximum specified drift. The position of the box on the vertical
scale will change from device to device as initial error and the
shape of the curve vary. Maximum height of the box for the
appropriate temperature range is shown in Figure 8.
Figure 8. Maximum +10 V or –10 V Output Change



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