AD7008SLASHPCB datasheet(2/16 Pages) AD

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AD7008–SPECIFICATIONS1

AD7008AP20

AD7008JP50

Test Conditions/

Parameter

Min

Typ

Max

Min

Typ

Max

Units

Comments

SIGNAL DAC SPECIFICATIONS

Resolution

Bits

Update Rate (fMAX)

MSPS

IOUT Full Scale

Output Compliance

Volts

DC Accuracy

Integral Nonlinearity

LSB

Differential Nonlinearity

±1

LSB

DDS SPECIFICATIONS

Update Rate (fMAX)

MSPS

Dynamic Specifications

Signal-to-Noise

fCLK = fMAX,

fOUT = 2 MHz

Total Harmonic Distortion

–55

–53

fCLK = fMAX,

fOUT = 2 MHz

Spurious Free Dynamic Range (SFDR)

Narrow Band (

±50 kHz)

–70

dBc

fCLK = 6.25 MHz,

fOUT = 2.11 MHz

Wide Band (

±2 MHz)

–55

dBc

VOLTAGE REFERENCE

Internal Reference @ +25

°C4

1.2

1.27

1.35

1.2

1.27

1.35

Volts

Reference TC

300

ppm/

°C

VREF Overdrive

LOGIC INPUTS

VINH, Input High Voltage

VDD–0.9

Volts

VINL, Input Low Voltage

0.9

Volts

IINH, Input Current

µA

CIN, Input Capacitance

POWER SUPPLIES

VDD

4.75

5.25

4.75

5.25

Volts

IAA

RSET = 390

Ω

IDD

22 + 1.5/MHz

IAA + IDD

fCLK = Max

110

125

160

Sleep = VDD

NOTES

1Operating temperature ranges as follows: A Version: –40

°C to +85°C; J Version: 0°C to +70°C.

2All dynamic specifications are measured using IOUT. 100% Production tested.

CLK = 6.25 MHz, Frequency Word = 5671C71C HEX, f OUT = 2.11 MHz.

REF may be externally driven between 0 and V DD.

5Do not allow reference current to cause power dissipation beyond the limit of I

AA + IDD shown above.

Specifications subject to change without notice.

REV. B

–2–

(VAA = VDD = +5 V

± 5%; T

A = TMIN to TMAX, RSET = 390

Ω, R

LOAD = 1

Ω for

IOUT and IOUT, unless otherwise noted)

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